radeonsi: define si_shader_io_get_unique_index() values as SI_UNIQUE_SLOT_*

for later use

Reviewed-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22833>

src/gallium/drivers/radeonsi/si_shader.c

@@ -88,43 +88,35 @@ unsigned si_shader_io_get_unique_index(unsigned semantic, bool is_varying)
 {
    switch (semantic) {
    case VARYING_SLOT_POS:
-      return 0;
+      return SI_UNIQUE_SLOT_POS;
    default:
-      /* Since some shader stages use the highest used IO index
-       * to determine the size to allocate for inputs/outputs
-       * (in LDS, tess and GS rings). GENERIC should be placed right
-       * after POSITION to make that size as small as possible.
-       */
       if (semantic >= VARYING_SLOT_VAR0 && semantic <= VARYING_SLOT_VAR31)
-         return 1 + (semantic - VARYING_SLOT_VAR0); /* 1..32 */
+         return SI_UNIQUE_SLOT_VAR0 + (semantic - VARYING_SLOT_VAR0);
 
-      /* Put 16-bit GLES varyings after 32-bit varyings. They can use the same indices as
-       * legacy desktop GL varyings because they are mutually exclusive.
-       */
       if (semantic >= VARYING_SLOT_VAR0_16BIT && semantic <= VARYING_SLOT_VAR15_16BIT)
-         return 33 + (semantic - VARYING_SLOT_VAR0_16BIT); /* 33..48 */
+         return SI_UNIQUE_SLOT_VAR0_16BIT + (semantic - VARYING_SLOT_VAR0_16BIT);
 
       assert(!"invalid generic index");
       return 0;
 
    /* Legacy desktop GL varyings. */
    case VARYING_SLOT_FOGC:
-      return 33;
+      return SI_UNIQUE_SLOT_FOGC;
    case VARYING_SLOT_COL0:
-      return 34;
+      return SI_UNIQUE_SLOT_COL0;
    case VARYING_SLOT_COL1:
-      return 35;
+      return SI_UNIQUE_SLOT_COL1;
    case VARYING_SLOT_BFC0:
       /* If it's a varying, COLOR and BCOLOR alias. */
       if (is_varying)
-         return 34;
+         return SI_UNIQUE_SLOT_COL0;
       else
-         return 36;
+         return SI_UNIQUE_SLOT_BFC0;
    case VARYING_SLOT_BFC1:
       if (is_varying)
-         return 35;
+         return SI_UNIQUE_SLOT_COL1;
       else
-         return 37;
+         return SI_UNIQUE_SLOT_BFC1;
    case VARYING_SLOT_TEX0:
    case VARYING_SLOT_TEX1:
    case VARYING_SLOT_TEX2:
@@ -133,25 +125,23 @@ unsigned si_shader_io_get_unique_index(unsigned semantic, bool is_varying)
    case VARYING_SLOT_TEX5:
    case VARYING_SLOT_TEX6:
    case VARYING_SLOT_TEX7:
-      return 38 + (semantic - VARYING_SLOT_TEX0);
+      return SI_UNIQUE_SLOT_TEX0 + (semantic - VARYING_SLOT_TEX0);
    case VARYING_SLOT_CLIP_VERTEX:
-      return 46;
+      return SI_UNIQUE_SLOT_CLIP_VERTEX;
 
-   /* Varyings present in both GLES and desktop GL must start at 49 after 16-bit varyings. */
+   /* Varyings present in both GLES and desktop GL. */
    case VARYING_SLOT_CLIP_DIST0:
-      return 49;
+      return SI_UNIQUE_SLOT_CLIP_DIST0;
    case VARYING_SLOT_CLIP_DIST1:
-      return 50;
+      return SI_UNIQUE_SLOT_CLIP_DIST1;
    case VARYING_SLOT_PSIZ:
-      return 51;
-
-   /* These can't be written by LS, HS, and ES. */
+      return SI_UNIQUE_SLOT_PSIZ;
    case VARYING_SLOT_LAYER:
-      return 52;
+      return SI_UNIQUE_SLOT_LAYER;
    case VARYING_SLOT_VIEWPORT:
-      return 53;
+      return SI_UNIQUE_SLOT_VIEWPORT;
    case VARYING_SLOT_PRIMITIVE_ID:
-      return 54;
+      return SI_UNIQUE_SLOT_PRIMITIVE_ID;
    }
 }
 

src/gallium/drivers/radeonsi/si_shader.h

@@ -85,10 +85,9 @@
  *   Name             Location
  *
  *   POSITION         0
- *   PSIZE            1
- *   CLIPDIST0..1     2..3
- *   CULLDIST0..1     (not implemented)
- *   GENERIC0..31     4..35
+ *   VAR0..31         1..32
+ *   CLIP_DIST0..1    49..50
+ *   PSIZ             51
  *
  * For example, a shader only writing GENERIC0 has the output stride of 5.
  *
@@ -317,6 +316,47 @@ enum si_shader_dump_type {
    SI_DUMP_ALWAYS,
 };
 
+enum {
+   SI_UNIQUE_SLOT_POS = 0,
+
+   /* Since some shader stages use the highest used IO index
+    * to determine the size to allocate for inputs/outputs
+    * (in LDS, tess and GS rings). VARn should be placed right
+    * after POSITION to make that size as small as possible.
+    */
+   SI_UNIQUE_SLOT_VAR0 = 1, /* 0..31 */
+
+   /* Put 16-bit GLES varyings after 32-bit varyings. They can use the same indices as
+    * legacy desktop GL varyings because they are mutually exclusive.
+    */
+   SI_UNIQUE_SLOT_VAR0_16BIT = 33, /* 0..15 */
+
+   /* Legacy GL-only varyings can alias GLES-only 16-bit varyings. */
+   SI_UNIQUE_SLOT_FOGC = 33,
+   SI_UNIQUE_SLOT_COL0,
+   SI_UNIQUE_SLOT_COL1,
+   SI_UNIQUE_SLOT_BFC0,
+   SI_UNIQUE_SLOT_BFC1,
+   SI_UNIQUE_SLOT_TEX0,
+   SI_UNIQUE_SLOT_TEX1,
+   SI_UNIQUE_SLOT_TEX2,
+   SI_UNIQUE_SLOT_TEX3,
+   SI_UNIQUE_SLOT_TEX4,
+   SI_UNIQUE_SLOT_TEX5,
+   SI_UNIQUE_SLOT_TEX6,
+   SI_UNIQUE_SLOT_TEX7,
+   SI_UNIQUE_SLOT_CLIP_VERTEX,
+
+   /* Varyings present in both GLES and desktop GL must start at 49 after 16-bit varyings. */
+   SI_UNIQUE_SLOT_CLIP_DIST0 = 49,
+   SI_UNIQUE_SLOT_CLIP_DIST1,
+   SI_UNIQUE_SLOT_PSIZ,
+   /* These can't be written by LS, HS, and ES. */
+   SI_UNIQUE_SLOT_LAYER,
+   SI_UNIQUE_SLOT_VIEWPORT,
+   SI_UNIQUE_SLOT_PRIMITIVE_ID,
+};
+
 /**
  * For VS shader keys, describe any fixups required for vertex fetch.
  *