diff --git a/src/intel/compiler/brw_eu_validate.c b/src/intel/compiler/brw_eu_validate.c
index 7b7896a0bfb..24ad8bbaed3 100644
--- a/src/intel/compiler/brw_eu_validate.c
+++ b/src/intel/compiler/brw_eu_validate.c
@@ -641,6 +641,17 @@ general_restrictions_based_on_operand_types(const struct brw_isa_info *isa,
       }
    }
 
+   if (devinfo->ver >= 20) {
+      if (inst->opcode == BRW_OPCODE_SRND) {
+         bool valid = false;
+         if (inst->dst.type == BRW_TYPE_HF &&
+             inst->src[0].type == BRW_TYPE_F &&
+             inst->src[1].type == BRW_TYPE_F)
+            valid = true;
+         ERROR_IF(!valid, "Invalid type combination for SRND.");
+      }
+   }
+
    enum brw_reg_type dst_type = inst->dst.type;
 
    ERROR_IF(brw_type_is_bfloat(dst_type) &&
diff --git a/src/intel/compiler/test_eu_validate.cpp b/src/intel/compiler/test_eu_validate.cpp
index 359ed86cf2e..4f84a3906e0 100644
--- a/src/intel/compiler/test_eu_validate.cpp
+++ b/src/intel/compiler/test_eu_validate.cpp
@@ -3921,3 +3921,34 @@ TEST_P(validation_test, bfloat_restrictions)
       clear_instructions(p);
    }
 }
+
+TEST_P(validation_test, srnd_type_and_immediate_restrictions)
+{
+   if (devinfo.ver < 20)
+      return;
+
+   struct brw_reg dst = retype(g0, BRW_TYPE_HF);
+   dst.hstride = 2;
+
+   brw_SRND(p,
+      dst,
+      retype(g0, BRW_TYPE_F),
+      retype(g0, BRW_TYPE_F));
+   EXPECT_TRUE(validate(p));
+   clear_instructions(p);
+
+   brw_SRND(p,
+      dst,
+      retype(g0, BRW_TYPE_F),
+      brw_imm_f(42.0f));
+   EXPECT_TRUE(validate(p));
+   clear_instructions(p);
+
+   /* Invalid type combinations */
+   brw_SRND(p,
+      dst,
+      retype(g0, BRW_TYPE_F),
+      retype(g0, BRW_TYPE_UW));
+   EXPECT_FALSE(validate(p));
+   clear_instructions(p);
+}