intel/brw: Delete SIMD4x2 URB opcodes

Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27872>
This commit is contained in:
Kenneth Graunke 2024-02-28 04:48:14 -08:00 committed by Marge Bot
parent 288b966e3e
commit a18030305c
3 changed files with 0 additions and 12 deletions

View file

@ -443,10 +443,6 @@ static const char *const sync_function[16] = {
};
static const char *const gfx7_urb_opcode[] = {
[BRW_URB_OPCODE_WRITE_HWORD] = "write HWord",
[BRW_URB_OPCODE_WRITE_OWORD] = "write OWord",
[BRW_URB_OPCODE_READ_HWORD] = "read HWord",
[BRW_URB_OPCODE_READ_OWORD] = "read OWord",
[GFX7_URB_OPCODE_ATOMIC_MOV] = "atomic mov", /* Gfx7+ */
[GFX7_URB_OPCODE_ATOMIC_INC] = "atomic inc", /* Gfx7+ */
[GFX8_URB_OPCODE_ATOMIC_ADD] = "atomic add", /* Gfx8+ */

View file

@ -1414,10 +1414,6 @@ enum brw_message_target {
#define GFX8_MATH_FUNCTION_INVM 14
#define GFX8_MATH_FUNCTION_RSQRTM 15
#define BRW_URB_OPCODE_WRITE_HWORD 0
#define BRW_URB_OPCODE_WRITE_OWORD 1
#define BRW_URB_OPCODE_READ_HWORD 2
#define BRW_URB_OPCODE_READ_OWORD 3
#define GFX7_URB_OPCODE_ATOMIC_MOV 4
#define GFX7_URB_OPCODE_ATOMIC_INC 5
#define GFX8_URB_OPCODE_ATOMIC_ADD 6

View file

@ -2278,10 +2278,6 @@ send_descriptor_restrictions(const struct brw_isa_info *isa,
"Header must be present for all URB messages.");
switch (brw_inst_urb_opcode(devinfo, inst)) {
case BRW_URB_OPCODE_READ_HWORD:
case BRW_URB_OPCODE_READ_OWORD:
case BRW_URB_OPCODE_WRITE_HWORD:
case BRW_URB_OPCODE_WRITE_OWORD:
case GFX7_URB_OPCODE_ATOMIC_INC:
case GFX7_URB_OPCODE_ATOMIC_MOV:
case GFX8_URB_OPCODE_ATOMIC_ADD: