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i965: properly initialize brw->cs.base.stage to MESA_SHADER_COMPUTE

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This has a bit of a surprising effect:

For the render pipeline, the upload_sampler_state_table atom emits
3DSTATE_BINDING_TABLE_POINTERS_XS.  It tries to avoid this for compute:

   if (GEN_GEN >= 7 && stage_state->stage != MESA_SHADER_COMPUTE) {
      /* Emit a 3DSTATE_SAMPLER_STATE_POINTERS_XS packet. */
      genX(emit_sampler_state_pointers_xs)(brw, stage_state);
   } ...

However, we were failing to initialize brw->cs.base.stage, so it was
left as 0 (MESA_SHADER_VERTEX), causing this condition to break.  We
then emitted 3DSTATE_SAMPLER_STATE_POINTERS_VS in GPGPU mode, when
trying to upload CS samplers.  Nothing good can come of this.

Found by inspection while debugging a GPU hang.  Jordan believes this
helps the Deus Ex: Mankind Divided benchmark mode's stability when
running with shader cache.

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
This commit is contained in:
Kenneth Graunke 2017-10-31 00:56:24 -07:00
parent 3e63cf893f
commit a16dc04ad5
1 changed files with 1 additions and 0 deletions
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1
src/mesa/drivers/dri/i965/brw_context.c
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@ -899,6 +899,7 @@ brwCreateContext(gl_api api,
brw->tes.base.stage = MESA_SHADER_TESS_EVAL;
brw->gs.base.stage = MESA_SHADER_GEOMETRY;
brw->wm.base.stage = MESA_SHADER_FRAGMENT;
brw->cs.base.stage = MESA_SHADER_COMPUTE;
if (devinfo->gen >= 8) {
brw->vtbl.emit_depth_stencil_hiz = gen8_emit_depth_stencil_hiz;
} else if (devinfo->gen >= 7) {