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i965: Make unsynchronized maps unsynchronized on non-LLC

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On Broxton, the performance of Unigine Valley 1.0 is improved by
13.3067% +/- 0.144322% (n=40) at 1280x720/QUALITY_LOW, and by
1.68478% +/- 0.484226% (n=3) at 1920x1080/QUALITY_LOW.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
This commit is contained in:
Matt Turner 2017-05-31 21:14:15 -07:00
parent ce17d4c5f5
commit a16355d67d
2 changed files with 3 additions and 22 deletions
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14
src/mesa/drivers/dri/i965/brw_bufmgr.c
View file

@ -772,19 +772,7 @@ brw_bo_map_gtt(struct brw_context *brw, struct brw_bo *bo, unsigned flags)
void *
brw_bo_map_unsynchronized(struct brw_context *brw, struct brw_bo *bo)
{
struct brw_bufmgr *bufmgr = bo->bufmgr;
/* If the CPU cache isn't coherent with the GTT, then use a
* regular synchronized mapping. The problem is that we don't
* track where the buffer was last used on the CPU side in
* terms of brw_bo_map_cpu vs brw_bo_map_gtt, so
* we would potentially corrupt the buffer even when the user
* does reasonable things.
*/
if (!bufmgr->has_llc)
return brw_bo_map_gtt(brw, bo, MAP_READ | MAP_WRITE);
else
return brw_bo_map_gtt(brw, bo, MAP_READ | MAP_WRITE | MAP_ASYNC);
return brw_bo_map_gtt(brw, bo, MAP_READ | MAP_WRITE | MAP_ASYNC);
}
static bool

11
src/mesa/drivers/dri/i965/intel_buffer_objects.c
View file

@ -400,15 +400,8 @@ brw_map_buffer_range(struct gl_context *ctx,
return obj->Mappings[index].Pointer;
}
void *map;
if (access & GL_MAP_UNSYNCHRONIZED_BIT) {
if (!brw->has_llc && brw->perf_debug &&
brw_bo_busy(intel_obj->buffer)) {
perf_debug("MapBufferRange with GL_MAP_UNSYNCHRONIZED_BIT stalling (it's actually synchronized on non-LLC platforms)\n");
}
map = brw_bo_map_unsynchronized(brw, intel_obj->buffer);
} else {
map = brw_bo_map(brw, intel_obj->buffer, access);
void *map = brw_bo_map(brw, intel_obj->buffer, access);
if (!(access & GL_MAP_UNSYNCHRONIZED_BIT)) {
mark_buffer_inactive(intel_obj);
}