From a13aab1859b1065a2c655a260e2bf01703dfe96c Mon Sep 17 00:00:00 2001
From: Nanley Chery <nanley.g.chery@intel.com>
Date: Fri, 18 Jul 2025 11:30:15 -0400
Subject: [PATCH] intel/isl: Update the initial HiZ state for Xe2+

Avoids ambiguating in iris and anv.

Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36383>
---
 src/intel/isl/isl_aux_info.c | 11 ++++++++++-
 1 file changed, 10 insertions(+), 1 deletion(-)

diff --git a/src/intel/isl/isl_aux_info.c b/src/intel/isl/isl_aux_info.c
index ee5e769be3f..f443d5a3815 100644
--- a/src/intel/isl/isl_aux_info.c
+++ b/src/intel/isl/isl_aux_info.c
@@ -136,7 +136,16 @@ isl_aux_get_initial_state(const struct intel_device_info *devinfo,
    case ISL_AUX_USAGE_HIZ:
    case ISL_AUX_USAGE_HIZ_CCS:
    case ISL_AUX_USAGE_HIZ_CCS_WT:
-      return ISL_AUX_STATE_AUX_INVALID;
+      if (devinfo->ver >= 20) {
+         /* According to HSD 22011236099, there are no illegal values for HiZ.
+          * As neither the main and aux surfaces contain anything of interest,
+          * treat them as being in sync. This state can avoid the need to
+          * ambiguate in some cases.
+          */
+         return ISL_AUX_STATE_RESOLVED;
+      } else {
+         return ISL_AUX_STATE_AUX_INVALID;
+      }
    case ISL_AUX_USAGE_MCS:
    case ISL_AUX_USAGE_MCS_CCS:
       if (zeroed) {