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intel/isl: Update the initial HiZ state for Xe2+

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Avoids ambiguating in iris and anv.

Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36383>
This commit is contained in:
Nanley Chery 2025-07-18 11:30:15 -04:00 • committed by Marge Bot
parent b709d7dd39
commit a13aab1859
1 changed files with 10 additions and 1 deletions
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11
src/intel/isl/isl_aux_info.c
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@ -136,7 +136,16 @@ isl_aux_get_initial_state(const struct intel_device_info *devinfo,
case ISL_AUX_USAGE_HIZ:
case ISL_AUX_USAGE_HIZ_CCS:
case ISL_AUX_USAGE_HIZ_CCS_WT:
return ISL_AUX_STATE_AUX_INVALID;
if (devinfo->ver >= 20) {
/* According to HSD 22011236099, there are no illegal values for HiZ.
* As neither the main and aux surfaces contain anything of interest,
* treat them as being in sync. This state can avoid the need to
* ambiguate in some cases.
*/
return ISL_AUX_STATE_RESOLVED;
} else {
return ISL_AUX_STATE_AUX_INVALID;
}
case ISL_AUX_USAGE_MCS:
case ISL_AUX_USAGE_MCS_CCS:
if (zeroed) {