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radv: implement vkCmdWriteTimestamp2KHR()

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Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13549>
This commit is contained in:
Samuel Pitoiset 2021-10-12 18:31:42 +02:00 • committed by Marge Bot
parent 1df7c0ce7e
commit a0ac03676f
2 changed files with 7 additions and 10 deletions
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6
src/amd/vulkan/layers/radv_sqtt_layer.c
View file

@ -666,10 +666,10 @@ sqtt_CmdEndQuery(VkCommandBuffer commandBuffer, VkQueryPool queryPool, uint32_t
}
VKAPI_ATTR void VKAPI_CALL
sqtt_CmdWriteTimestamp(VkCommandBuffer commandBuffer, VkPipelineStageFlagBits pipelineStage,
VkQueryPool queryPool, uint32_t flags)
sqtt_CmdWriteTimestamp2KHR(VkCommandBuffer commandBuffer, VkPipelineStageFlags2KHR stage,
VkQueryPool queryPool, uint32_t query)
{
API_MARKER(WriteTimestamp, commandBuffer, pipelineStage, queryPool, flags);
API_MARKER_ALIAS(WriteTimestamp2KHR, WriteTimestamp, commandBuffer, stage, queryPool, query);
}
VKAPI_ATTR void VKAPI_CALL

11
src/amd/vulkan/radv_query.c
View file

@ -1609,8 +1609,8 @@ radv_CmdEndQuery(VkCommandBuffer commandBuffer, VkQueryPool queryPool, uint32_t
}
VKAPI_ATTR void VKAPI_CALL
radv_CmdWriteTimestamp(VkCommandBuffer commandBuffer, VkPipelineStageFlagBits pipelineStage,
VkQueryPool queryPool, uint32_t query)
radv_CmdWriteTimestamp2KHR(VkCommandBuffer commandBuffer, VkPipelineStageFlags2KHR stage,
VkQueryPool queryPool, uint32_t query)
{
RADV_FROM_HANDLE(radv_cmd_buffer, cmd_buffer, commandBuffer);
RADV_FROM_HANDLE(radv_query_pool, pool, queryPool);
@ -1630,8 +1630,7 @@ radv_CmdWriteTimestamp(VkCommandBuffer commandBuffer, VkPipelineStageFlagBits pi
ASSERTED unsigned cdw_max = radeon_check_space(cmd_buffer->device->ws, cs, 28 * num_queries);
for (unsigned i = 0; i < num_queries; i++) {
switch (pipelineStage) {
case VK_PIPELINE_STAGE_TOP_OF_PIPE_BIT:
if (stage == VK_PIPELINE_STAGE_2_TOP_OF_PIPE_BIT_KHR) {
radeon_emit(cs, PKT3(PKT3_COPY_DATA, 4, 0));
radeon_emit(cs, COPY_DATA_COUNT_SEL | COPY_DATA_WR_CONFIRM |
COPY_DATA_SRC_SEL(COPY_DATA_TIMESTAMP) | COPY_DATA_DST_SEL(V_370_MEM));
@ -1639,13 +1638,11 @@ radv_CmdWriteTimestamp(VkCommandBuffer commandBuffer, VkPipelineStageFlagBits pi
radeon_emit(cs, 0);
radeon_emit(cs, query_va);
radeon_emit(cs, query_va >> 32);
break;
default:
} else {
si_cs_emit_write_event_eop(cs, cmd_buffer->device->physical_device->rad_info.chip_class,
mec, V_028A90_BOTTOM_OF_PIPE_TS, 0, EOP_DST_SEL_MEM,
EOP_DATA_SEL_TIMESTAMP, query_va, 0,
cmd_buffer->gfx9_eop_bug_va);
break;
}
query_va += pool->stride;
}