ac/gpu_info: rename has_virtual_memory -> r600_has_virtual_memory

This commit is contained in:
Marek Olšák 2018-03-19 18:42:32 -04:00
parent 32b3932de1
commit a0a96819e1
8 changed files with 25 additions and 25 deletions

View file

@ -331,7 +331,7 @@ bool ac_query_gpu_info(int fd, amdgpu_device_handle dev,
info->pipe_interleave_bytes =
256 << G_0098F8_PIPE_INTERLEAVE_SIZE_GFX6(amdinfo->gb_addr_cfg);
}
info->has_virtual_memory = true;
info->r600_has_virtual_memory = true;
assert(util_is_power_of_two_or_zero(dma.available_rings + 1));
assert(util_is_power_of_two_or_zero(compute.available_rings + 1));

View file

@ -61,7 +61,7 @@ struct radeon_info {
uint32_t min_alloc_size;
uint32_t address32_hi;
bool has_dedicated_vram;
bool has_virtual_memory;
bool r600_has_virtual_memory;
bool gfx_ib_pad_with_type2;
bool has_hw_decode;
unsigned ib_start_alignment;

View file

@ -206,7 +206,7 @@ bool r600_alloc_resource(struct r600_common_screen *rscreen,
old_buf = res->buf;
res->buf = new_buf; /* should be atomic */
if (rscreen->info.has_virtual_memory)
if (rscreen->info.r600_has_virtual_memory)
res->gpu_address = rscreen->ws->buffer_get_virtual_address(res->buf);
else
res->gpu_address = 0;
@ -654,7 +654,7 @@ r600_buffer_from_user_memory(struct pipe_screen *screen,
return NULL;
}
if (rscreen->info.has_virtual_memory)
if (rscreen->info.r600_has_virtual_memory)
rbuffer->gpu_address =
ws->buffer_get_virtual_address(rbuffer->buf);
else

View file

@ -119,7 +119,7 @@ static inline void r600_emit_reloc(struct r600_common_context *rctx,
enum radeon_bo_priority priority)
{
struct radeon_winsys_cs *cs = ring->cs;
bool has_vm = ((struct r600_common_screen*)rctx->b.screen)->info.has_virtual_memory;
bool has_vm = ((struct r600_common_screen*)rctx->b.screen)->info.r600_has_virtual_memory;
unsigned reloc = radeon_add_to_buffer_list(rctx, ring, rbo, usage, priority);
if (!has_vm) {

View file

@ -127,7 +127,7 @@ unsigned r600_gfx_write_fence_dwords(struct r600_common_screen *screen)
{
unsigned dwords = 6;
if (!screen->info.has_virtual_memory)
if (!screen->info.r600_has_virtual_memory)
dwords += 2;
return dwords;
@ -311,7 +311,7 @@ void r600_need_dma_space(struct r600_common_context *ctx, unsigned num_dw,
/* If GPUVM is not supported, the CS checker needs 2 entries
* in the buffer list per packet, which has to be done manually.
*/
if (ctx->screen->info.has_virtual_memory) {
if (ctx->screen->info.r600_has_virtual_memory) {
if (dst)
radeon_add_to_buffer_list(ctx, &ctx->dma, dst,
RADEON_USAGE_WRITE,
@ -1356,7 +1356,7 @@ bool r600_common_screen_init(struct r600_common_screen *rscreen,
(int)DIV_ROUND_UP(rscreen->info.max_alloc_size, 1024*1024));
printf("min_alloc_size = %u\n", rscreen->info.min_alloc_size);
printf("has_dedicated_vram = %u\n", rscreen->info.has_dedicated_vram);
printf("has_virtual_memory = %i\n", rscreen->info.has_virtual_memory);
printf("r600_has_virtual_memory = %i\n", rscreen->info.r600_has_virtual_memory);
printf("gfx_ib_pad_with_type2 = %i\n", rscreen->info.gfx_ib_pad_with_type2);
printf("has_hw_decode = %u\n", rscreen->info.has_hw_decode);
printf("num_sdma_rings = %i\n", rscreen->info.num_sdma_rings);

View file

@ -371,7 +371,7 @@ void radeon_bo_destroy(struct pb_buffer *_buf)
if (bo->u.real.ptr)
os_munmap(bo->u.real.ptr, bo->base.size);
if (rws->info.has_virtual_memory) {
if (rws->info.r600_has_virtual_memory) {
if (rws->va_unmap_working) {
struct drm_radeon_gem_va va;
@ -679,7 +679,7 @@ static struct radeon_bo *radeon_create_bo(struct radeon_drm_winsys *rws,
heap);
}
if (rws->info.has_virtual_memory) {
if (rws->info.r600_has_virtual_memory) {
struct drm_radeon_gem_va va;
unsigned va_gap_size;
@ -974,7 +974,7 @@ radeon_winsys_bo_create(struct radeon_winsys *rws,
/* Sub-allocate small buffers from slabs. */
if (!(flags & RADEON_FLAG_NO_SUBALLOC) &&
size <= (1 << RADEON_SLAB_MAX_SIZE_LOG2) &&
ws->info.has_virtual_memory &&
ws->info.r600_has_virtual_memory &&
alignment <= MAX2(1 << RADEON_SLAB_MIN_SIZE_LOG2, util_next_power_of_two(size))) {
struct pb_slab_entry *entry;
int heap = radeon_get_heap_index(domain, flags);
@ -1027,7 +1027,7 @@ no_slab:
bo = radeon_create_bo(ws, size, alignment, domain, flags, heap);
if (!bo) {
/* Clear the cache and try again. */
if (ws->info.has_virtual_memory)
if (ws->info.r600_has_virtual_memory)
pb_slabs_reclaim(&ws->bo_slabs);
pb_cache_release_all_buffers(&ws->bo_cache);
bo = radeon_create_bo(ws, size, alignment, domain, flags, heap);
@ -1089,7 +1089,7 @@ static struct pb_buffer *radeon_winsys_bo_from_ptr(struct radeon_winsys *rws,
mtx_unlock(&ws->bo_handles_mutex);
if (ws->info.has_virtual_memory) {
if (ws->info.r600_has_virtual_memory) {
struct drm_radeon_gem_va va;
bo->va = radeon_bomgr_find_va64(ws, bo->base.size, 1 << 20);
@ -1232,7 +1232,7 @@ done:
if (offset)
*offset = whandle->offset;
if (ws->info.has_virtual_memory && !bo->va) {
if (ws->info.r600_has_virtual_memory && !bo->va) {
struct drm_radeon_gem_va va;
bo->va = radeon_bomgr_find_va64(ws, bo->base.size, 1 << 20);

View file

@ -245,7 +245,7 @@ static unsigned radeon_lookup_or_add_real_buffer(struct radeon_drm_cs *cs,
* This doesn't have to be done if virtual memory is enabled,
* because there is no offset patching with virtual memory.
*/
if (cs->ring_type != RING_DMA || cs->ws->info.has_virtual_memory) {
if (cs->ring_type != RING_DMA || cs->ws->info.r600_has_virtual_memory) {
return i;
}
}
@ -635,7 +635,7 @@ static int radeon_drm_cs_flush(struct radeon_winsys_cs *rcs,
cs->cst->flags[0] = 0;
cs->cst->flags[1] = RADEON_CS_RING_DMA;
cs->cst->cs.num_chunks = 3;
if (cs->ws->info.has_virtual_memory) {
if (cs->ws->info.r600_has_virtual_memory) {
cs->cst->flags[0] |= RADEON_CS_USE_VM;
}
break;
@ -659,7 +659,7 @@ static int radeon_drm_cs_flush(struct radeon_winsys_cs *rcs,
cs->cst->flags[1] = RADEON_CS_RING_GFX;
cs->cst->cs.num_chunks = 3;
if (cs->ws->info.has_virtual_memory) {
if (cs->ws->info.r600_has_virtual_memory) {
cs->cst->flags[0] |= RADEON_CS_USE_VM;
cs->cst->cs.num_chunks = 3;
}

View file

@ -439,22 +439,22 @@ static bool do_winsys_init(struct radeon_drm_winsys *ws)
radeon_get_drm_value(ws->fd, RADEON_INFO_SI_BACKEND_ENABLED_MASK, NULL,
&ws->info.enabled_rb_mask);
ws->info.has_virtual_memory = false;
ws->info.r600_has_virtual_memory = false;
if (ws->info.drm_minor >= 13) {
uint32_t ib_vm_max_size;
ws->info.has_virtual_memory = true;
ws->info.r600_has_virtual_memory = true;
if (!radeon_get_drm_value(ws->fd, RADEON_INFO_VA_START, NULL,
&ws->va_start))
ws->info.has_virtual_memory = false;
ws->info.r600_has_virtual_memory = false;
if (!radeon_get_drm_value(ws->fd, RADEON_INFO_IB_VM_MAX_SIZE, NULL,
&ib_vm_max_size))
ws->info.has_virtual_memory = false;
ws->info.r600_has_virtual_memory = false;
radeon_get_drm_value(ws->fd, RADEON_INFO_VA_UNMAP_WORKING, NULL,
&ws->va_unmap_working);
}
if (ws->gen == DRV_R600 && !debug_get_bool_option("RADEON_VA", false))
ws->info.has_virtual_memory = false;
ws->info.r600_has_virtual_memory = false;
}
/* Get max pipes, this is only needed for compute shaders. All evergreen+
@ -544,7 +544,7 @@ static void radeon_winsys_destroy(struct radeon_winsys *rws)
mtx_destroy(&ws->hyperz_owner_mutex);
mtx_destroy(&ws->cmask_owner_mutex);
if (ws->info.has_virtual_memory)
if (ws->info.r600_has_virtual_memory)
pb_slabs_deinit(&ws->bo_slabs);
pb_cache_deinit(&ws->bo_cache);
@ -773,7 +773,7 @@ radeon_drm_winsys_create(int fd, const struct pipe_screen_config *config,
radeon_bo_destroy,
radeon_bo_can_reclaim);
if (ws->info.has_virtual_memory) {
if (ws->info.r600_has_virtual_memory) {
/* There is no fundamental obstacle to using slab buffer allocation
* without GPUVM, but enabling it requires making sure that the drivers
* honor the address offset.
@ -877,7 +877,7 @@ radeon_drm_winsys_create(int fd, const struct pipe_screen_config *config,
return &ws->base;
fail_slab:
if (ws->info.has_virtual_memory)
if (ws->info.r600_has_virtual_memory)
pb_slabs_deinit(&ws->bo_slabs);
fail_cache:
pb_cache_deinit(&ws->bo_cache);