panvk: Map ro_sink_address_poly to an OOB address

Mali hardware handles a bunch of OOB conditions by using addresses with
the top bit set.  When the top bit is set, any load/store from a shader
will treat the address as OOB and read zero and discard writes.  We can
use this to implement ro_sink_address_poly.

Signed-off-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38547>
This commit is contained in:
Faith Ekstrand 2025-11-19 10:26:20 -05:00 committed by Marge Bot
parent 1ee08415cd
commit a0a232220f
3 changed files with 18 additions and 0 deletions

View file

@ -194,6 +194,13 @@ lower_sysvals(nir_builder *b, nir_intrinsic_instr *intr, UNUSED void *_data)
bit_size, num_comps);
break;
case nir_intrinsic_load_ro_sink_address_poly:
/* Any address with the top bit set is treated as OOB by the hardware
* and any reads return zero.
*/
val = nir_imm_int64(b, PAN_SHADER_OOB_ADDRESS);
break;
case nir_intrinsic_load_printf_buffer_address:
val = load_sysval_from_push_const(
b,

View file

@ -28,6 +28,13 @@ void pan_postprocess_nir(nir_shader *nir, unsigned gpu_id);
#define PAN_PRINTF_BUFFER_SIZE 16384
/* Any address with the top bit set is treated OOB by the hardware when
* accessed from a shader and any reads will return zero and writes will be
* discarded. Using these is sometimes preferable to control-flow in the
* shader.
*/
#define PAN_SHADER_OOB_ADDRESS (((uint64_t)1) << 63)
/* Indices for named (non-XFB) varyings that are present. These are packed
* tightly so they correspond to a bitfield present (P) indexed by (1 <<
* PAN_VARY_*). This has the nice property that you can lookup the buffer index

View file

@ -181,6 +181,10 @@ panvk_lower_sysvals(nir_builder *b, nir_instr *instr, void *data)
break;
}
case nir_intrinsic_load_ro_sink_address_poly:
val = nir_imm_int64(b, PAN_SHADER_OOB_ADDRESS);
break;
default:
return false;
}