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https://gitlab.freedesktop.org/mesa/mesa.git
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combine emit_unop(), emit_binop(), emit_triop() into emit_arith()
This commit is contained in:
Brian
parent
62e7c033c0
commit
a06f929362
1 changed files with 52 additions and 109 deletions
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@ -503,8 +503,8 @@ storage_annotation(const slang_ir_node *n, const struct gl_program *prog)
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* Return an annotation string for an instruction.
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*/
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static char *
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instruction_annotation(gl_inst_opcode opcode,
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char *dstAnnot, char *srcAnnot0, char *srcAnnot1)
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instruction_annotation(gl_inst_opcode opcode, char *dstAnnot,
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char *srcAnnot0, char *srcAnnot1, char *srcAnnot2)
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{
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#if ANNOTATE
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const char *operator;
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@ -526,6 +526,11 @@ instruction_annotation(gl_inst_opcode opcode,
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else
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srcAnnot1 = _mesa_strdup("");
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if (srcAnnot2)
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len += strlen(srcAnnot2);
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else
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srcAnnot2 = _mesa_strdup("");
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switch (opcode) {
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case OPCODE_ADD:
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operator = "+";
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@ -556,12 +561,14 @@ instruction_annotation(gl_inst_opcode opcode,
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}
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s = (char *) malloc(len);
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sprintf(s, "%s = %s %s %s", dstAnnot, srcAnnot0, operator, srcAnnot1);
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sprintf(s, "%s = %s %s %s %s", dstAnnot,
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srcAnnot0, operator, srcAnnot1, srcAnnot2);
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assert(_mesa_strlen(s) < len);
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free(dstAnnot);
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free(srcAnnot0);
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free(srcAnnot1);
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free(srcAnnot2);
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return s;
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#else
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@ -572,21 +579,26 @@ instruction_annotation(gl_inst_opcode opcode,
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/**
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* Generate code for a simple binary-op instruction.
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* Generate code for a simple arithmetic instruction.
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* Either 1, 2 or 3 operands.
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*/
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static struct prog_instruction *
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emit_binop(slang_var_table *vt, slang_ir_node *n, struct gl_program *prog)
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emit_arith(slang_var_table *vt, slang_ir_node *n, struct gl_program *prog)
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{
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struct prog_instruction *inst;
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const slang_ir_info *info = slang_find_ir_info(n->Opcode);
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char *srcAnnot0 = NULL, *srcAnnot1 = NULL, *dstAnnot = NULL;
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char *srcAnnot[3], *dstAnnot;
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GLuint i;
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assert(info);
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assert(info->InstOpcode != OPCODE_NOP);
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srcAnnot[0] = srcAnnot[1] = srcAnnot[2] = dstAnnot = NULL;
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#if PEEPHOLE_OPTIMIZATIONS
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/* Look for MAD opportunity */
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if (n->Opcode == IR_ADD && n->Children[0]->Opcode == IR_MUL) {
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if (info->NumParams == 2 &&
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n->Opcode == IR_ADD && n->Children[0]->Opcode == IR_MUL) {
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/* found pattern IR_ADD(IR_MUL(A, B), C) */
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emit(vt, n->Children[0]->Children[0], prog); /* A */
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emit(vt, n->Children[0]->Children[1], prog); /* B */
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@ -601,7 +613,8 @@ emit_binop(slang_var_table *vt, slang_ir_node *n, struct gl_program *prog)
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free_temp_storage(vt, n->Children[0]->Children[1]);
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free_temp_storage(vt, n->Children[1]);
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}
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else if (n->Opcode == IR_ADD && n->Children[1]->Opcode == IR_MUL) {
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else if (info->NumParams == 2 &&
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n->Opcode == IR_ADD && n->Children[1]->Opcode == IR_MUL) {
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/* found pattern IR_ADD(A, IR_MUL(B, C)) */
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emit(vt, n->Children[0], prog); /* A */
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emit(vt, n->Children[1]->Children[0], prog); /* B */
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@ -622,21 +635,24 @@ emit_binop(slang_var_table *vt, slang_ir_node *n, struct gl_program *prog)
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/* normal case */
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/* gen code for children */
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emit(vt, n->Children[0], prog);
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emit(vt, n->Children[1], prog);
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for (i = 0; i < info->NumParams; i++)
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emit(vt, n->Children[i], prog);
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/* gen this instruction */
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/* gen this instruction and src registers */
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inst = new_instruction(prog, info->InstOpcode);
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storage_to_src_reg(&inst->SrcReg[0], n->Children[0]->Store);
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storage_to_src_reg(&inst->SrcReg[1], n->Children[1]->Store);
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for (i = 0; i < info->NumParams; i++)
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storage_to_src_reg(&inst->SrcReg[i], n->Children[i]->Store);
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srcAnnot0 = storage_annotation(n->Children[0], prog);
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srcAnnot1 = storage_annotation(n->Children[1], prog);
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/* annotation */
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for (i = 0; i < info->NumParams; i++)
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srcAnnot[i] = storage_annotation(n->Children[i], prog);
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free_temp_storage(vt, n->Children[0]);
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free_temp_storage(vt, n->Children[1]);
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/* free temps */
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for (i = 0; i < info->NumParams; i++)
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free_temp_storage(vt, n->Children[i]);
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}
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/* result storage */
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if (!n->Store) {
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if (!alloc_temp_storage(vt, n, info->ResultSize))
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return NULL;
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@ -644,87 +660,15 @@ emit_binop(slang_var_table *vt, slang_ir_node *n, struct gl_program *prog)
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storage_to_dst_reg(&inst->DstReg, n->Store, n->Writemask);
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dstAnnot = storage_annotation(n, prog);
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inst->Comment = instruction_annotation(inst->Opcode, dstAnnot,
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srcAnnot0, srcAnnot1);
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inst->Comment = instruction_annotation(inst->Opcode, dstAnnot, srcAnnot[0],
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srcAnnot[1], srcAnnot[2]);
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/*_mesa_print_instruction(inst);*/
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return inst;
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}
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static struct prog_instruction *
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emit_unop(slang_var_table *vt, slang_ir_node *n, struct gl_program *prog)
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{
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struct prog_instruction *inst;
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const slang_ir_info *info = slang_find_ir_info(n->Opcode);
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char *srcAnnot, *dstAnnot;
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assert(info);
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assert(info->NumParams == 1);
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/* gen code for child */
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emit(vt, n->Children[0], prog);
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/* gen this instruction */
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inst = new_instruction(prog, info->InstOpcode);
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storage_to_src_reg(&inst->SrcReg[0], n->Children[0]->Store);
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srcAnnot = storage_annotation(n->Children[0], prog);
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free_temp_storage(vt, n->Children[0]);
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if (!n->Store) {
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if (!alloc_temp_storage(vt, n, info->ResultSize))
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return NULL;
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}
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storage_to_dst_reg(&inst->DstReg, n->Store, n->Writemask);
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dstAnnot = storage_annotation(n, prog);
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inst->Comment = instruction_annotation(inst->Opcode, dstAnnot,
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NULL, srcAnnot);
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return inst;
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}
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/**
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* Generate code for a simple tri-op instruction.
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*/
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static struct prog_instruction *
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emit_triop(slang_var_table *vt, slang_ir_node *n, struct gl_program *prog)
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{
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struct prog_instruction *inst;
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const slang_ir_info *info = slang_find_ir_info(n->Opcode);
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assert(info);
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assert(info->InstOpcode != OPCODE_NOP);
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/* only one tri-op IR node (for now): */
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assert(info->InstOpcode == OPCODE_LRP);
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/* gen code for children */
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emit(vt, n->Children[0], prog);
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emit(vt, n->Children[1], prog);
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emit(vt, n->Children[2], prog);
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/* gen this instruction */
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inst = new_instruction(prog, info->InstOpcode);
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storage_to_src_reg(&inst->SrcReg[0], n->Children[0]->Store);
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storage_to_src_reg(&inst->SrcReg[1], n->Children[1]->Store);
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storage_to_src_reg(&inst->SrcReg[2], n->Children[2]->Store);
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free_temp_storage(vt, n->Children[0]);
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free_temp_storage(vt, n->Children[1]);
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free_temp_storage(vt, n->Children[2]);
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if (!n->Store) {
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if (!alloc_temp_storage(vt, n, info->ResultSize))
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return NULL;
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}
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storage_to_dst_reg(&inst->DstReg, n->Store, n->Writemask);
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return inst;
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}
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static struct prog_instruction *
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emit_negation(slang_var_table *vt, slang_ir_node *n, struct gl_program *prog)
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@ -898,7 +842,7 @@ emit_move(slang_var_table *vt, slang_ir_node *n, struct gl_program *prog)
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dstAnnot = storage_annotation(n->Children[0], prog);
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srcAnnot = storage_annotation(n->Children[1], prog);
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inst->Comment = instruction_annotation(inst->Opcode, dstAnnot,
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srcAnnot, NULL);
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srcAnnot, NULL, NULL);
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}
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free_temp_storage(vt, n->Children[1]);
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assert(!n->Store);
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@ -1038,7 +982,19 @@ emit(slang_var_table *vt, slang_ir_node *n, struct gl_program *prog)
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n->Store->Swizzle);
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return NULL;
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/* Simple binary operators */
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/* Simple arithmetic */
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/* unary */
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case IR_RSQ:
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case IR_RCP:
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case IR_FLOOR:
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case IR_FRAC:
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case IR_F_TO_I:
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case IR_ABS:
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case IR_SIN:
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case IR_COS:
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case IR_DDX:
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case IR_DDY:
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/* binary */
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case IR_ADD:
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case IR_SUB:
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case IR_MUL:
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@ -1054,22 +1010,9 @@ emit(slang_var_table *vt, slang_ir_node *n, struct gl_program *prog)
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case IR_POW:
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case IR_EXP:
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case IR_EXP2:
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return emit_binop(vt, n, prog);
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/* Simple unary operators */
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case IR_RSQ:
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case IR_RCP:
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case IR_FLOOR:
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case IR_FRAC:
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case IR_F_TO_I:
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case IR_ABS:
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case IR_SIN:
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case IR_COS:
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case IR_DDX:
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case IR_DDY:
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return emit_unop(vt, n, prog);
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/* trianary operators */
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/* trinary operators */
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case IR_LRP:
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return emit_triop(vt, n, prog);
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return emit_arith(vt, n, prog);
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case IR_TEX:
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case IR_TEXB:
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case IR_TEXP:
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