radv: make sure CP DMA is idle before executing secondary command buffers

Buffer copies with CP DMA aren't synced.

Fix dEQP-VK.memory.pipeline_barrier.transfer_src_transfer_dst.65536
flakes on GFX10+.

Fixes: e870796113 ("radv: prefer CP DMA for GTT buffer copies/clears on dGPUs due to slow PCIe")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10427>
(cherry picked from commit 3d979c9169)
This commit is contained in:
Samuel Pitoiset 2021-04-23 11:54:22 +02:00 committed by Eric Engestrom
parent 71a46b9a9d
commit a0614e1135
2 changed files with 4 additions and 1 deletions

View file

@ -229,7 +229,7 @@
"description": "radv: make sure CP DMA is idle before executing secondary command buffers",
"nominated": true,
"nomination_type": 1,
"resolution": 0,
"resolution": 1,
"master_sha": null,
"because_sha": "e8707961134daa9b91599840ad5698366a6229b7"
},

View file

@ -4743,6 +4743,9 @@ radv_CmdExecuteCommands(VkCommandBuffer commandBuffer, uint32_t commandBufferCou
/* Emit pending flushes on primary prior to executing secondary */
si_emit_cache_flush(primary);
/* Make sure CP DMA is idle on primary prior to executing secondary. */
si_cp_dma_wait_for_idle(primary);
for (uint32_t i = 0; i < commandBufferCount; i++) {
RADV_FROM_HANDLE(radv_cmd_buffer, secondary, pCmdBuffers[i]);