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ac/nir: stop using nir_gather_xfb_info_from_intrinsics

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Given that we no longer need the slot_to_register mapping, it's
useless to use this function.

This also fixes a bunch of failures with
dEQP-VK.transform_feedback.*omit_write* on RADV because in Vulkan
the spec requires XFB query counters to be incremented even if XFB
outputs aren't written to.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19437>
This commit is contained in:
Samuel Pitoiset 2022-11-01 12:06:57 +01:00 • committed by Marge Bot
parent d0c9ab529e
commit 9ff2bed7be
1 changed files with 5 additions and 14 deletions
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19
src/amd/common/ac_nir_lower_ngg.c
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@ -1697,7 +1697,7 @@ ngg_build_streamout_buffer_info(nir_builder *b,
assert(info->buffers[buffer].stride);
prim_stride_ret[buffer] =
nir_imul_imm(b, num_vert_per_prim, info->buffers[buffer].stride * 4);
nir_imul_imm(b, num_vert_per_prim, info->buffers[buffer].stride);
so_buffer_ret[buffer] = nir_load_streamout_buffer_amd(b, .base = buffer);
}
@ -1817,7 +1817,7 @@ ngg_build_streamout_vertex(nir_builder *b, nir_xfb_info *info,
if (!(info->buffers_written & BITFIELD_BIT(buffer)))
continue;
nir_ssa_def *offset = nir_imul_imm(b, vtx_buffer_idx, info->buffers[buffer].stride * 4);
nir_ssa_def *offset = nir_imul_imm(b, vtx_buffer_idx, info->buffers[buffer].stride);
vtx_buffer_offsets[buffer] = nir_iadd(b, buffer_offsets[buffer], offset);
}
@ -1829,7 +1829,7 @@ ngg_build_streamout_vertex(nir_builder *b, nir_xfb_info *info,
unsigned base = util_bitcount64(b->shader->info.outputs_written & BITFIELD64_MASK(out->location));
unsigned offset = (base * 4 + out->component_offset) * 4;
unsigned count = util_bitcount(out->component_mask);
/* component_mask is constructed like this, see nir_gather_xfb_info_from_intrinsics() */
assert(u_bit_consecutive(out->component_offset, count) == out->component_mask);
nir_ssa_def *out_data =
@ -1847,11 +1847,7 @@ ngg_build_streamout_vertex(nir_builder *b, nir_xfb_info *info,
static void
ngg_nogs_build_streamout(nir_builder *b, lower_ngg_nogs_state *s)
{
nir_xfb_info *info = nir_gather_xfb_info_from_intrinsics(b->shader, NULL);
if (unlikely(!info)) {
s->streamout_enabled = false;
return;
}
nir_xfb_info *info = b->shader->xfb_info;
nir_ssa_def *lds_scratch_base = nir_load_lds_ngg_scratch_base_amd(b);
@ -1904,8 +1900,6 @@ ngg_nogs_build_streamout(nir_builder *b, lower_ngg_nogs_state *s)
* can't observe test fail without this barrier.
*/
nir_memory_barrier_buffer(b);
free(info);
}
static unsigned
@ -2231,7 +2225,6 @@ ac_nir_lower_ngg_nogs(nir_shader *shader, const ac_nir_lower_ngg_options *option
ngg_nogs_build_streamout(b, &state);
}
/* streamout may be disabled by ngg_nogs_build_streamout() */
if (state.streamout_enabled || has_user_edgeflags) {
ngg_nogs_store_all_outputs_to_lds(shader, &state);
b->cursor = nir_after_cf_list(&impl->body);
@ -2983,9 +2976,7 @@ ngg_gs_cull_primitive(nir_builder *b, nir_ssa_def *tid_in_tg, nir_ssa_def *max_v
static void
ngg_gs_build_streamout(nir_builder *b, lower_ngg_gs_state *st)
{
nir_xfb_info *info = nir_gather_xfb_info_from_intrinsics(b->shader, NULL);
if (unlikely(!info))
return;
nir_xfb_info *info = b->shader->xfb_info;
nir_ssa_def *tid_in_tg = nir_load_local_invocation_index(b);
nir_ssa_def *max_vtxcnt = nir_load_workgroup_num_input_vertices_amd(b);