d3d12: Support enhanced layouts for VS inputs

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26156>
This commit is contained in:
Jesse Natalie 2023-11-09 09:01:25 -08:00 committed by Marge Bot
parent 72341747f4
commit 9fe88dd9b9
5 changed files with 48 additions and 11 deletions

View file

@ -32,8 +32,6 @@ spec@!opengl 3.2@gl-3.2-adj-prims line cull-back pv-last,Fail
spec@!opengl 3.2@gl-3.2-adj-prims line cull-front pv-last,Fail
spec@!opengl 3.2@gl-3.2-adj-prims pv-last,Fail
spec@arb_draw_indirect@arb_draw_indirect-api-errors,Crash
spec@arb_explicit_attrib_location@overlapping-locations-input-attribs api,Crash
spec@arb_explicit_attrib_location@overlapping-locations-input-attribs shader,Crash
spec@arb_framebuffer_object@fbo-blit-scaled-linear,Fail
spec@arb_get_program_binary@restore-sso-program,Fail
spec@arb_point_sprite@arb_point_sprite-mipmap,Fail
@ -138,8 +136,6 @@ spec@arb_texture_stencil8@texwrap formats@GL_STENCIL_INDEX8,Fail
spec@arb_texture_stencil8@texwrap formats@GL_STENCIL_INDEX8- NPOT,Fail
spec@arb_texture_stencil8@texwrap formats@GL_STENCIL_INDEX8- swizzled,Fail
spec@arb_transform_feedback_instanced@draw-auto instanced,Fail
spec@arb_vertex_attrib_64bit@arb_vertex_attrib_64bit-overlapping-locations api,Crash
spec@arb_vertex_attrib_64bit@arb_vertex_attrib_64bit-overlapping-locations shader,Crash
spec@arb_vertex_program@arb_vertex_program-matrix-property-bindings,Fail
spec@ext_framebuffer_blit@fbo-blit-check-limits,Fail
spec@ext_framebuffer_multisample@accuracy 16 srgb depthstencil,Fail

View file

@ -1554,13 +1554,20 @@ d3d12_create_shader(struct d3d12_context *ctx,
NIR_PASS_V(nir, dxil_nir_split_clip_cull_distance);
NIR_PASS_V(nir, d3d12_split_needed_varyings);
if (nir->info.stage != MESA_SHADER_VERTEX)
if (nir->info.stage != MESA_SHADER_VERTEX) {
nir->info.inputs_read =
dxil_reassign_driver_locations(nir, nir_var_shader_in,
prev ? prev->current->nir->info.outputs_written : 0);
else
dxil_reassign_driver_locations(nir, nir_var_shader_in,
prev ? prev->current->nir->info.outputs_written : 0);
} else {
nir->info.inputs_read = dxil_sort_by_driver_location(nir, nir_var_shader_in);
uint32_t driver_loc = 0;
nir_foreach_variable_with_modes(var, nir, nir_var_shader_in) {
var->data.driver_location = driver_loc;
driver_loc += glsl_count_attribute_slots(var->type, false);
}
}
if (nir->info.stage != MESA_SHADER_FRAGMENT) {
nir->info.outputs_written =
dxil_reassign_driver_locations(nir, nir_var_shader_out,

View file

@ -139,7 +139,6 @@ d3d12_create_vertex_elements_state(struct pipe_context *pctx,
unsigned max_vb = 0;
for (unsigned i = 0; i < num_elements; ++i) {
cso->elements[i].SemanticName = "TEXCOORD";
cso->elements[i].SemanticIndex = i;
enum pipe_format format_helper =
d3d12_emulated_vtx_format((enum pipe_format)elements[i].src_format);

View file

@ -130,6 +130,8 @@ fill_so_declaration(const struct pipe_stream_output_info *info,
if (skip_components > 0) {
entries[*num_entries].Stream = output->stream;
entries[*num_entries].SemanticName = NULL;
entries[*num_entries].SemanticIndex = 0;
entries[*num_entries].StartComponent = 0;
entries[*num_entries].ComponentCount = skip_components;
entries[*num_entries].OutputSlot = buffer;
(*num_entries)++;
@ -224,6 +226,34 @@ d3d12_rtv_format(struct d3d12_context *ctx, unsigned index)
return fmt;
}
static void
copy_input_attribs(const D3D12_INPUT_ELEMENT_DESC *ves_elements, D3D12_INPUT_ELEMENT_DESC *ia_elements,
D3D12_INPUT_LAYOUT_DESC *ia_desc, nir_shader *vs)
{
uint32_t vert_input_count = 0;
int32_t ves_element_count = -1;
int var_loc = -1;
nir_foreach_shader_in_variable(var, vs) {
assert(vert_input_count < D3D12_VS_INPUT_REGISTER_COUNT);
if (var->data.location != var_loc)
ves_element_count++;
var_loc = var->data.location;
for (uint32_t i = 0; i < glsl_count_attribute_slots(var->type, false); ++i) {
ia_elements[vert_input_count] = ves_elements[ves_element_count++];
ia_elements[vert_input_count].SemanticIndex = vert_input_count;
var->data.driver_location = vert_input_count++;
}
--ves_element_count;
}
if (vert_input_count > 0) {
ia_desc->pInputElementDescs = ia_elements;
ia_desc->NumElements = vert_input_count;
}
}
static ID3D12PipelineState *
create_gfx_pipeline_state(struct d3d12_context *ctx)
{
@ -231,8 +261,9 @@ create_gfx_pipeline_state(struct d3d12_context *ctx)
struct d3d12_gfx_pipeline_state *state = &ctx->gfx_pipeline_state;
enum mesa_prim reduced_prim = state->prim_type == MESA_PRIM_PATCHES ?
MESA_PRIM_PATCHES : u_reduced_prim(state->prim_type);
D3D12_SO_DECLARATION_ENTRY entries[PIPE_MAX_SO_OUTPUTS] = {};
UINT strides[PIPE_MAX_SO_OUTPUTS] = { 0 };
D3D12_SO_DECLARATION_ENTRY entries[PIPE_MAX_SO_OUTPUTS];
UINT strides[PIPE_MAX_VERTEX_STREAMS] = { 0 };
D3D12_INPUT_ELEMENT_DESC input_attribs[PIPE_MAX_ATTRIBS * 4];
UINT num_entries = 0, num_strides = 0;
CD3DX12_PIPELINE_STATE_STREAM3 pso_desc;
@ -304,6 +335,7 @@ create_gfx_pipeline_state(struct d3d12_context *ctx)
D3D12_INPUT_LAYOUT_DESC& input_layout = (D3D12_INPUT_LAYOUT_DESC&)pso_desc.InputLayout;
input_layout.pInputElementDescs = state->ves->elements;
input_layout.NumElements = state->ves->num_elements;
copy_input_attribs(state->ves->elements, input_attribs, &input_layout, state->stages[PIPE_SHADER_VERTEX]->nir);
pso_desc.IBStripCutValue = state->ib_strip_cut_value;

View file

@ -575,6 +575,9 @@ get_input_signature_group(struct dxil_module *mod,
/* Note: Specifically search for a variable that has space for these additional components */
nir_foreach_variable_with_modes(test_var, s, modes) {
if (var->data.location == test_var->data.location) {
/* Variables should be sorted such that we're only looking for an already-emitted variable */
if (test_var == var)
break;
base_var = test_var;
if (test_var->data.location_frac == 0 &&
glsl_get_component_slots(