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radeonsi,driconf: add clamp_div_by_zero option

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Cc: mesa-stable
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6259>
(cherry picked from commit b8445520cb)
This commit is contained in:
Pierre-Eric Pelloux-Prayer 2020-08-13 11:15:36 +02:00 • committed by Eric Engestrom
parent 0c96f0c600
commit 9fd8d60220
5 changed files with 8 additions and 2 deletions
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2
.pick_status.json
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@ -22,7 +22,7 @@
"description": "radeonsi,driconf: add clamp_div_by_zero option",
"nominated": true,
"nomination_type": 0,
"resolution": 0,
"resolution": 1,
"master_sha": null,
"because_sha": null
},

1
src/gallium/drivers/radeonsi/si_debug_options.h
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@ -7,5 +7,6 @@ OPT_BOOL(halt_shaders, false, "Halt shaders at the start (will hang)")
OPT_BOOL(vs_fetch_always_opencode, false,
"Always open code vertex fetches (less efficient, purely for testing)")
OPT_BOOL(prim_restart_tri_strips_only, false, "Only enable primitive restart for triangle strips")
OPT_BOOL(clamp_div_by_zero, false, "Clamp div by zero (x / 0 becomes FLT_MAX instead of NaN)")
#undef OPT_BOOL

5
src/gallium/drivers/radeonsi/si_pipe.c
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@ -885,7 +885,7 @@ static void si_disk_cache_create(struct si_screen *sscreen)
disk_cache_format_hex_id(cache_id, sha1, 20 * 2);
/* These flags affect shader compilation. */
#define ALL_FLAGS (DBG(GISEL))
#define ALL_FLAGS (DBG(GISEL) | DBG(CLAMP_DIV_BY_ZERO))
uint64_t shader_debug_flags = sscreen->debug_flags & ALL_FLAGS;
/* Add the high bits of 32-bit addresses, which affects
@ -1002,6 +1002,9 @@ static struct pipe_screen *radeonsi_screen_create_impl(struct radeon_winsys *ws,
#include "si_debug_options.h"
}
if (sscreen->options.clamp_div_by_zero)
sscreen->debug_flags |= DBG(CLAMP_DIV_BY_ZERO);
si_disk_cache_create(sscreen);
/* Determine the number of shader compiler threads. */

1
src/gallium/drivers/radeonsi/si_pipe.h
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@ -159,6 +159,7 @@ enum
DBG_W64_GE,
DBG_W64_PS,
DBG_W64_CS,
DBG_CLAMP_DIV_BY_ZERO,
/* Shader compiler options (with no effect on the shader cache): */
DBG_CHECK_IR,

1
src/gallium/drivers/radeonsi/si_shader_llvm.c
View file

@ -452,6 +452,7 @@ bool si_nir_build_llvm(struct si_shader_context *ctx, struct nir_shader *nir)
ctx->abi.inputs = &ctx->inputs[0];
ctx->abi.clamp_shadow_reference = true;
ctx->abi.robust_buffer_access = true;
ctx->abi.clamp_div_by_zero = ctx->screen->options.clamp_div_by_zero;
if (ctx->shader->selector->info.properties[TGSI_PROPERTY_CS_LOCAL_SIZE]) {
assert(gl_shader_stage_is_compute(nir->info.stage));