fdo-mirrors/mesa
1
0
Fork 0
mirror of https://gitlab.freedesktop.org/mesa/mesa.git synced 2026-05-04 22:49:13 +02:00
Code Issues Projects Releases Packages Wiki Activity Actions 2

nvc0: invalidate textures/samplers on GK104+

Browse source 
Like Fermi, textures and samplers are aliased between 3D and compute,
especially the TIC_FLUSH/TSC_FLUSH methods and we have to re-validate
these resources when switching between the two pipelines.

This fixes a GPU hang with Elemental (and most likely with other UE4 demos).

Tested on GK107 and GM107.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
CC: <mesa-stable@lists.freedesktop.org>
(cherry picked from commit a227b0a4f1)
This commit is contained in:
Samuel Pitoiset 2016-08-24 20:22:52 +02:00 • committed by Emil Velikov
parent 5ad09f744c
commit 9fced1aa53
2 changed files with 22 additions and 12 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

20
src/gallium/drivers/nouveau/nvc0/nvc0_tex.c
View file

@ -589,13 +589,11 @@ void nvc0_validate_textures(struct nvc0_context *nvc0)
PUSH_DATA (nvc0->base.pushbuf, 0);
}
if (nvc0->screen->base.class_3d < NVE4_3D_CLASS) {
/* Invalidate all CP textures because they are aliased. */
for (int i = 0; i < nvc0->num_textures[5]; i++)
nouveau_bufctx_reset(nvc0->bufctx_3d, NVC0_BIND_CP_TEX(i));
nvc0->textures_dirty[5] = ~0;
nvc0->dirty_cp |= NVC0_NEW_CP_TEXTURES;
}
/* Invalidate all CP textures because they are aliased. */
for (int i = 0; i < nvc0->num_textures[5]; i++)
nouveau_bufctx_reset(nvc0->bufctx_3d, NVC0_BIND_CP_TEX(i));
nvc0->textures_dirty[5] = ~0;
nvc0->dirty_cp |= NVC0_NEW_CP_TEXTURES;
}
bool
@ -709,11 +707,9 @@ void nvc0_validate_samplers(struct nvc0_context *nvc0)
PUSH_DATA (nvc0->base.pushbuf, 0);
}
if (nvc0->screen->base.class_3d < NVE4_3D_CLASS) {
/* Invalidate all CP samplers because they are aliased. */
nvc0->samplers_dirty[5] = ~0;
nvc0->dirty_cp |= NVC0_NEW_CP_SAMPLERS;
}
/* Invalidate all CP samplers because they are aliased. */
nvc0->samplers_dirty[5] = ~0;
nvc0->dirty_cp |= NVC0_NEW_CP_SAMPLERS;
}
/* Upload the "diagonal" entries for the possible texture sources ($t == $s).

14
src/gallium/drivers/nouveau/nvc0/nve4_compute.c
View file

@ -237,7 +237,13 @@ nve4_compute_validate_samplers(struct nvc0_context *nvc0)
BEGIN_NVC0(nvc0->base.pushbuf, NVE4_CP(TSC_FLUSH), 1);
PUSH_DATA (nvc0->base.pushbuf, 0);
}
/* Invalidate all 3D samplers because they are aliased. */
for (int s = 0; s < 5; s++)
nvc0->samplers_dirty[s] = ~0;
nvc0->dirty_3d |= NVC0_NEW_3D_SAMPLERS;
}
/* (Code duplicated at bottom for various non-convincing reasons.
* E.g. we might want to use the COMPUTE subchannel to upload TIC/TSC
* entries to avoid a subchannel switch.
@ -686,6 +692,14 @@ nve4_compute_validate_textures(struct nvc0_context *nvc0)
}
nvc0->state.num_textures[s] = nvc0->num_textures[s];
/* Invalidate all 3D textures because they are aliased. */
for (int s = 0; s < 5; s++) {
for (int i = 0; i < nvc0->num_textures[s]; i++)
nouveau_bufctx_reset(nvc0->bufctx_3d, NVC0_BIND_3D_TEX(s, i));
nvc0->textures_dirty[s] = ~0;
}
nvc0->dirty_3d |= NVC0_NEW_3D_TEXTURES;
}