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nvc0: stick compute kernel arguments into uniform_bo
Having one buffer object for input kernel arguments coming from clover and an other one for OpenGL user uniforms is unnecessary. Using the uniform_bo object for both GL/CL uniforms avoids to declare a new BO. This only affects compute programs but it should not hurt anything because the states are dirtied and data will get reuploaded. Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
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124a5d4ca0
commit
9f92a8f00a
5 changed files with 10 additions and 26 deletions
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@ -55,11 +55,6 @@ nvc0_screen_compute_setup(struct nvc0_screen *screen,
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return ret;
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}
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ret = nouveau_bo_new(dev, NV_VRAM_DOMAIN(&screen->base), 0, 1 << 12, NULL,
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&screen->parm);
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if (ret)
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return ret;
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BEGIN_NVC0(push, SUBC_CP(NV01_SUBCHAN_OBJECT), 1);
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PUSH_DATA (push, screen->compute->oclass);
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@ -296,10 +291,13 @@ nvc0_compute_upload_input(struct nvc0_context *nvc0, const void *input)
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struct nvc0_program *cp = nvc0->compprog;
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if (cp->parm_size) {
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struct nouveau_bo *bo = screen->uniform_bo;
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const unsigned base = NVC0_CB_USR_INFO(5);
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BEGIN_NVC0(push, NVC0_CP(CB_SIZE), 3);
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PUSH_DATA (push, align(cp->parm_size, 0x100));
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PUSH_DATAh(push, screen->parm->offset);
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PUSH_DATA (push, screen->parm->offset);
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PUSH_DATAh(push, bo->offset + base);
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PUSH_DATA (push, bo->offset + base);
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BEGIN_NVC0(push, NVC0_CP(CB_BIND), 1);
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PUSH_DATA (push, (0 << 8) | 1);
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/* NOTE: size is limited to 4 KiB, which is < NV04_PFIFO_MAX_PACKET_LEN */
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@ -429,7 +429,6 @@ nvc0_create(struct pipe_screen *pscreen, void *priv, unsigned ctxflags)
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BCTX_REFN_bo(nvc0->bufctx_cp, CP_SCREEN, flags, screen->text);
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BCTX_REFN_bo(nvc0->bufctx_cp, CP_SCREEN, flags, screen->uniform_bo);
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BCTX_REFN_bo(nvc0->bufctx_cp, CP_SCREEN, flags, screen->txc);
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BCTX_REFN_bo(nvc0->bufctx_cp, CP_SCREEN, flags, screen->parm);
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}
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flags = NV_VRAM_DOMAIN(&screen->base) | NOUVEAU_BO_RDWR;
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@ -516,7 +516,6 @@ nvc0_screen_destroy(struct pipe_screen *pscreen)
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nouveau_bo_ref(NULL, &screen->txc);
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nouveau_bo_ref(NULL, &screen->fence.bo);
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nouveau_bo_ref(NULL, &screen->poly_cache);
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nouveau_bo_ref(NULL, &screen->parm);
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nouveau_heap_destroy(&screen->lib_code);
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nouveau_heap_destroy(&screen->text_heap);
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@ -65,7 +65,6 @@ struct nvc0_screen {
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int num_occlusion_queries_active;
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struct nouveau_bo *text;
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struct nouveau_bo *parm; /* for COMPUTE */
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struct nouveau_bo *uniform_bo;
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struct nouveau_bo *tls;
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struct nouveau_bo *txc; /* TIC (offset 0) and TSC (65536) */
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@ -69,11 +69,6 @@ nve4_screen_compute_setup(struct nvc0_screen *screen,
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return ret;
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}
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ret = nouveau_bo_new(dev, NV_VRAM_DOMAIN(&screen->base), 0, 1 << 12, NULL,
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&screen->parm);
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if (ret)
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return ret;
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BEGIN_NVC0(push, SUBC_CP(NV01_SUBCHAN_OBJECT), 1);
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PUSH_DATA (push, screen->compute->oclass);
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@ -477,7 +472,6 @@ nve4_state_validate_cp(struct nvc0_context *nvc0, uint32_t mask)
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static void
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nve4_compute_upload_input(struct nvc0_context *nvc0,
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struct nve4_cp_launch_desc *desc,
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const struct pipe_grid_info *info)
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{
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struct nvc0_screen *screen = nvc0->screen;
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@ -489,19 +483,14 @@ nve4_compute_upload_input(struct nvc0_context *nvc0,
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if (cp->parm_size) {
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BEGIN_NVC0(push, NVE4_CP(UPLOAD_DST_ADDRESS_HIGH), 2);
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PUSH_DATAh(push, screen->parm->offset);
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PUSH_DATA (push, screen->parm->offset);
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PUSH_DATAh(push, screen->uniform_bo->offset + NVC0_CB_USR_INFO(5));
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PUSH_DATA (push, screen->uniform_bo->offset + NVC0_CB_USR_INFO(5));
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BEGIN_NVC0(push, NVE4_CP(UPLOAD_LINE_LENGTH_IN), 2);
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PUSH_DATA (push, cp->parm_size);
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PUSH_DATA (push, 0x1);
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BEGIN_1IC0(push, NVE4_CP(UPLOAD_EXEC), 1 + (cp->parm_size / 4));
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PUSH_DATA (push, NVE4_COMPUTE_UPLOAD_EXEC_LINEAR | (0x20 << 1));
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PUSH_DATAp(push, info->input, cp->parm_size / 4);
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/* Bind user parameters coming from clover. */
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/* TODO: This should be harmonized with uniform_bo. */
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assert(!(desc->cb_mask & (1 << 0)));
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nve4_cp_launch_desc_set_cb(desc, 0, screen->parm, 0, 1 << 12);
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}
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BEGIN_NVC0(push, NVE4_CP(UPLOAD_DST_ADDRESS_HIGH), 2);
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PUSH_DATAh(push, address + NVC0_CB_AUX_GRID_INFO);
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@ -572,10 +561,10 @@ nve4_compute_setup_launch_desc(struct nvc0_context *nvc0,
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desc->gpr_alloc = cp->num_gprs;
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desc->bar_alloc = cp->num_barriers;
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// Only bind OpenGL uniforms and the driver constant buffer through the
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// Only bind user uniforms and the driver constant buffer through the
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// launch descriptor because UBOs are sticked to the driver cb to avoid the
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// limitation of 8 CBs.
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if (nvc0->constbuf[5][0].user) {
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if (nvc0->constbuf[5][0].user || cp->parm_size) {
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nve4_cp_launch_desc_set_cb(desc, 0, screen->uniform_bo,
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NVC0_CB_USR_INFO(5), 1 << 16);
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}
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@ -622,7 +611,7 @@ nve4_launch_grid(struct pipe_context *pipe, const struct pipe_grid_info *info)
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nve4_compute_setup_launch_desc(nvc0, desc, info);
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nve4_compute_upload_input(nvc0, desc, info);
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nve4_compute_upload_input(nvc0, info);
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#ifdef DEBUG
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if (debug_get_num_option("NV50_PROG_DEBUG", 0))
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