fdo-mirrors/mesa
1
0
Fork 0
mirror of https://gitlab.freedesktop.org/mesa/mesa.git synced 2026-01-16 22:20:29 +01:00
Code Issues Projects Releases Packages Wiki Activity Actions 2

radeon/vcn: add gaps_in_frame flag to h264 sps

Browse source 
Implement gaps_in_frame_num_value_allowed_flag in h264 msg buffer.
Replace hardcoded flag values with defines.

Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Reviewed-by: David Rosca <david.rosca@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36056>
(cherry picked from commit a63e5f015e)
This commit is contained in:
Boyuan Zhang 2025-07-09 12:25:32 -04:00 • committed by Eric Engestrom
parent 5e6edfd65b
commit 9f5a3f7bf2
3 changed files with 17 additions and 6 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

2
.pick_status.json
View file

@ -6004,7 +6004,7 @@
"description": "radeon/vcn: add gaps_in_frame flag to h264 sps",
"nominated": false,
"nomination_type": 0,
"resolution": 4,
"resolution": 1,
"main_sha": null,
"because_sha": null,
"notes": null

7
src/amd/common/ac_vcn_dec.h
View file

@ -149,7 +149,12 @@
#define RDECODE_FEEDBACK_PROFILING 0x00000001
#define RDECODE_SPS_INFO_H264_EXTENSION_SUPPORT_FLAG_SHIFT 7
#define RDECODE_SPS_INFO_H264_DIRECT_8X8_INFERENCE_FLAG_SHIFT 0
#define RDECODE_SPS_INFO_H264_MB_ADAPTIVE_FRAME_FIELD_FLAG_SHIFT 1
#define RDECODE_SPS_INFO_H264_FRAME_MBS_ONLY_FLAG_SHIFT 2
#define RDECODE_SPS_INFO_H264_DELTA_PIC_ORDER_ALWAYS_ZERO_FLAG_SHIFT 3
#define RDECODE_SPS_INFO_H264_GAPS_IN_FRAME_NUM_VALUE_ALLOWED_FLAG_SHIFT 5
#define RDECODE_SPS_INFO_H264_EXTENSION_SUPPORT_FLAG_SHIFT 7
#define RDECODE_VP9_PROBS_DATA_SIZE 2304

14
src/gallium/drivers/radeonsi/radeon_vcn_dec.c
View file

@ -76,10 +76,16 @@ static rvcn_dec_message_avc_t get_h264_msg(struct radeon_decoder *dec,
result.level = dec->base.level;
result.sps_info_flags = 0;
result.sps_info_flags |= pic->pps->sps->direct_8x8_inference_flag << 0;
result.sps_info_flags |= pic->pps->sps->mb_adaptive_frame_field_flag << 1;
result.sps_info_flags |= pic->pps->sps->frame_mbs_only_flag << 2;
result.sps_info_flags |= pic->pps->sps->delta_pic_order_always_zero_flag << 3;
result.sps_info_flags |= pic->pps->sps->direct_8x8_inference_flag
<< RDECODE_SPS_INFO_H264_DIRECT_8X8_INFERENCE_FLAG_SHIFT;
result.sps_info_flags |= pic->pps->sps->mb_adaptive_frame_field_flag
<< RDECODE_SPS_INFO_H264_MB_ADAPTIVE_FRAME_FIELD_FLAG_SHIFT;
result.sps_info_flags |= pic->pps->sps->frame_mbs_only_flag
<< RDECODE_SPS_INFO_H264_FRAME_MBS_ONLY_FLAG_SHIFT;
result.sps_info_flags |= pic->pps->sps->delta_pic_order_always_zero_flag
<< RDECODE_SPS_INFO_H264_DELTA_PIC_ORDER_ALWAYS_ZERO_FLAG_SHIFT;
result.sps_info_flags |= pic->pps->sps->gaps_in_frame_num_value_allowed_flag
<< RDECODE_SPS_INFO_H264_GAPS_IN_FRAME_NUM_VALUE_ALLOWED_FLAG_SHIFT;
result.sps_info_flags |= ((dec->dpb_type >= DPB_DYNAMIC_TIER_2) ? 0 : 1)
<< RDECODE_SPS_INFO_H264_EXTENSION_SUPPORT_FLAG_SHIFT;