From 9f4358ee77ebedbb50121e0f5795d5b831b3433b Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Jos=C3=A9=20Roberto=20de=20Souza?= Date: Fri, 22 May 2026 13:00:03 -0700 Subject: [PATCH] intel/dev: Add a Xe2+ table of URB min and max entries MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Some values were wrong, so here adding the whole table with all fixed values. Just to make easier to read and compare I have added all shader stages to XEHP_URB_MIN_MAX_ENTRIES. Reviewed-by: Jordan Justen Signed-off-by: José Roberto de Souza Part-of: --- src/intel/dev/intel_device_info.c | 27 ++++++++++++++++++++++++++- 1 file changed, 26 insertions(+), 1 deletion(-) diff --git a/src/intel/dev/intel_device_info.c b/src/intel/dev/intel_device_info.c index 092d83fd233..5ee5c87a1c0 100644 --- a/src/intel/dev/intel_device_info.c +++ b/src/intel/dev/intel_device_info.c @@ -1022,8 +1022,11 @@ static const struct intel_device_info intel_device_info_sg1 = { .size = 768, /* For intel_stub_gpu */ \ .min_entries = { \ [MESA_SHADER_VERTEX] = 64, \ + [MESA_SHADER_TESS_CTRL] = 0, \ [MESA_SHADER_TESS_EVAL] = 34, \ [MESA_SHADER_GEOMETRY] = 2, \ + [MESA_SHADER_TASK] = 0, \ + [MESA_SHADER_MESH] = 0, \ }, \ .max_entries = { \ [MESA_SHADER_VERTEX] = 3832, /* BSpec 47138 */ \ @@ -1176,9 +1179,31 @@ static const struct intel_device_info intel_device_info_arl_h = { .compressed = PAT_ENTRY(9, INVALID) \ } +#define XE2_URB_MIN_MAX_ENTRIES \ + .urb = { \ + .size = 768, /* For intel_stub_gpu */ \ + .min_entries = { \ + [MESA_SHADER_VERTEX] = 64, \ + [MESA_SHADER_TESS_CTRL] = 0, \ + [MESA_SHADER_TESS_EVAL] = 50, \ + [MESA_SHADER_GEOMETRY] = 2, \ + [MESA_SHADER_TASK] = 0, \ + [MESA_SHADER_MESH] = 1, \ + }, \ + .max_entries = { \ + [MESA_SHADER_VERTEX] = 4800, /* BSpec 56268 */ \ + [MESA_SHADER_TESS_CTRL] = 1548, /* BSpec 56265 */ \ + [MESA_SHADER_TESS_EVAL] = 4480, /* BSpec 56263 */ \ + [MESA_SHADER_GEOMETRY] = 1952, /* BSpec 56264 */ \ + [MESA_SHADER_TASK] = 1548, /* BSpec 56267 */ \ + [MESA_SHADER_MESH] = 1952, /* BSpec 56266 */ \ + } \ + } + #define XE2_CONFIG(platform_suffix) \ XE2_FEATURES, XE2_PAT_ENTRIES, \ XEHP_PLACEHOLDER_THREADS_AND_URB, \ + XE2_URB_MIN_MAX_ENTRIES, \ .platform = INTEL_PLATFORM_ ## platform_suffix static const struct intel_device_info intel_device_info_bmg = { @@ -1197,7 +1222,7 @@ static const struct intel_device_info intel_device_info_lnl = { .verx10 = 300 #define XE3_URB_MIN_MAX_ENTRIES \ - XEHP_URB_MIN_MAX_ENTRIES + XE2_URB_MIN_MAX_ENTRIES #define XE3_PLACEHOLDER_THREADS_AND_URB \ XEHP_PLACEHOLDER_THREADS_AND_URB, \