fdo-mirrors/mesa
1
0
Fork 0
mirror of https://gitlab.freedesktop.org/mesa/mesa.git synced 2026-01-29 16:00:24 +01:00
Code Issues Projects Releases Packages Wiki Activity Actions 5

r600g: remove r600_resource_buffer struct

Browse source 
This subclass of r600_resource doesn't contain any useful members,
so let's just use r600_resource.
This commit is contained in:
Marek Olšák 2011-09-11 18:46:54 +02:00
parent ac028b20e5
commit 9f0dc855b2
4 changed files with 65 additions and 80 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

108
src/gallium/drivers/r600/r600_buffer.c
View file

@ -40,12 +40,12 @@ static void r600_buffer_destroy(struct pipe_screen *screen,
struct pipe_resource *buf)
{
struct r600_screen *rscreen = (struct r600_screen*)screen;
struct r600_resource_buffer *rbuffer = r600_buffer(buf);
struct r600_resource *rbuffer = r600_resource(buf);
if (rbuffer->r.bo) {
r600_bo_reference(&rbuffer->r.bo, NULL);
if (rbuffer->bo) {
r600_bo_reference(&rbuffer->bo, NULL);
}
rbuffer->r.bo = NULL;
rbuffer->bo = NULL;
util_slab_free(&rscreen->pool_buffers, rbuffer);
}
@ -75,14 +75,14 @@ static struct pipe_transfer *r600_get_transfer(struct pipe_context *ctx,
static void *r600_buffer_transfer_map(struct pipe_context *pipe,
struct pipe_transfer *transfer)
{
struct r600_resource_buffer *rbuffer = r600_buffer(transfer->resource);
struct r600_resource *rbuffer = r600_resource(transfer->resource);
struct r600_pipe_context *rctx = (struct r600_pipe_context*)pipe;
uint8_t *data;
if (rbuffer->r.b.user_ptr)
return (uint8_t*)rbuffer->r.b.user_ptr + transfer->box.x;
if (rbuffer->b.user_ptr)
return (uint8_t*)rbuffer->b.user_ptr + transfer->box.x;
data = r600_bo_map(rctx->screen->radeon, rbuffer->r.bo, rctx->ctx.cs, transfer->usage);
data = r600_bo_map(rctx->screen->radeon, rbuffer->bo, rctx->ctx.cs, transfer->usage);
if (!data)
return NULL;
@ -92,14 +92,14 @@ static void *r600_buffer_transfer_map(struct pipe_context *pipe,
static void r600_buffer_transfer_unmap(struct pipe_context *pipe,
struct pipe_transfer *transfer)
{
struct r600_resource_buffer *rbuffer = r600_buffer(transfer->resource);
struct r600_resource *rbuffer = r600_resource(transfer->resource);
struct r600_pipe_context *rctx = (struct r600_pipe_context*)pipe;
if (rbuffer->r.b.user_ptr)
if (rbuffer->b.user_ptr)
return;
if (rbuffer->r.bo)
r600_bo_unmap(rctx->screen->radeon, rbuffer->r.bo);
if (rbuffer->bo)
r600_bo_unmap(rctx->screen->radeon, rbuffer->bo);
}
static void r600_buffer_transfer_flush_region(struct pipe_context *pipe,
@ -126,18 +126,18 @@ static void r600_buffer_transfer_inline_write(struct pipe_context *pipe,
{
struct r600_pipe_context *rctx = (struct r600_pipe_context*)pipe;
struct radeon *radeon = rctx->screen->radeon;
struct r600_resource_buffer *rbuffer = r600_buffer(resource);
struct r600_resource *rbuffer = r600_resource(resource);
uint8_t *map = NULL;
assert(rbuffer->r.b.user_ptr == NULL);
assert(rbuffer->b.user_ptr == NULL);
map = r600_bo_map(radeon, rbuffer->r.bo, rctx->ctx.cs,
map = r600_bo_map(radeon, rbuffer->bo, rctx->ctx.cs,
PIPE_TRANSFER_WRITE | PIPE_TRANSFER_DISCARD | usage);
memcpy(map + box->x, data, box->width);
if (rbuffer->r.bo)
r600_bo_unmap(radeon, rbuffer->r.bo);
if (rbuffer->bo)
r600_bo_unmap(radeon, rbuffer->bo);
}
static const struct u_resource_vtbl r600_buffer_vtbl =
@ -156,33 +156,32 @@ struct pipe_resource *r600_buffer_create(struct pipe_screen *screen,
const struct pipe_resource *templ)
{
struct r600_screen *rscreen = (struct r600_screen*)screen;
struct r600_resource_buffer *rbuffer;
struct r600_resource *rbuffer;
struct r600_bo *bo;
/* XXX We probably want a different alignment for buffers and textures. */
unsigned alignment = 4096;
rbuffer = util_slab_alloc(&rscreen->pool_buffers);
rbuffer->magic = R600_BUFFER_MAGIC;
rbuffer->r.b.b.b = *templ;
pipe_reference_init(&rbuffer->r.b.b.b.reference, 1);
rbuffer->r.b.b.b.screen = screen;
rbuffer->r.b.b.vtbl = &r600_buffer_vtbl;
rbuffer->r.b.user_ptr = NULL;
rbuffer->r.size = rbuffer->r.b.b.b.width0;
rbuffer->r.bo_size = rbuffer->r.size;
rbuffer->b.b.b = *templ;
pipe_reference_init(&rbuffer->b.b.b.reference, 1);
rbuffer->b.b.b.screen = screen;
rbuffer->b.b.vtbl = &r600_buffer_vtbl;
rbuffer->b.user_ptr = NULL;
rbuffer->size = rbuffer->b.b.b.width0;
rbuffer->bo_size = rbuffer->size;
bo = r600_bo(rscreen->radeon,
rbuffer->r.b.b.b.width0,
alignment, rbuffer->r.b.b.b.bind,
rbuffer->r.b.b.b.usage);
rbuffer->b.b.b.width0,
alignment, rbuffer->b.b.b.bind,
rbuffer->b.b.b.usage);
if (bo == NULL) {
FREE(rbuffer);
return NULL;
}
rbuffer->r.bo = bo;
return &rbuffer->r.b.b.b;
rbuffer->bo = bo;
return &rbuffer->b.b.b;
}
struct pipe_resource *r600_user_buffer_create(struct pipe_screen *screen,
@ -190,27 +189,26 @@ struct pipe_resource *r600_user_buffer_create(struct pipe_screen *screen,
unsigned bind)
{
struct r600_screen *rscreen = (struct r600_screen*)screen;
struct r600_resource_buffer *rbuffer;
struct r600_resource *rbuffer;
rbuffer = util_slab_alloc(&rscreen->pool_buffers);
rbuffer->magic = R600_BUFFER_MAGIC;
pipe_reference_init(&rbuffer->r.b.b.b.reference, 1);
rbuffer->r.b.b.vtbl = &r600_buffer_vtbl;
rbuffer->r.b.b.b.screen = screen;
rbuffer->r.b.b.b.target = PIPE_BUFFER;
rbuffer->r.b.b.b.format = PIPE_FORMAT_R8_UNORM;
rbuffer->r.b.b.b.usage = PIPE_USAGE_IMMUTABLE;
rbuffer->r.b.b.b.bind = bind;
rbuffer->r.b.b.b.width0 = bytes;
rbuffer->r.b.b.b.height0 = 1;
rbuffer->r.b.b.b.depth0 = 1;
rbuffer->r.b.b.b.array_size = 1;
rbuffer->r.b.b.b.flags = 0;
rbuffer->r.b.user_ptr = ptr;
rbuffer->r.bo = NULL;
rbuffer->r.bo_size = 0;
return &rbuffer->r.b.b.b;
pipe_reference_init(&rbuffer->b.b.b.reference, 1);
rbuffer->b.b.vtbl = &r600_buffer_vtbl;
rbuffer->b.b.b.screen = screen;
rbuffer->b.b.b.target = PIPE_BUFFER;
rbuffer->b.b.b.format = PIPE_FORMAT_R8_UNORM;
rbuffer->b.b.b.usage = PIPE_USAGE_IMMUTABLE;
rbuffer->b.b.b.bind = bind;
rbuffer->b.b.b.width0 = bytes;
rbuffer->b.b.b.height0 = 1;
rbuffer->b.b.b.depth0 = 1;
rbuffer->b.b.b.array_size = 1;
rbuffer->b.b.b.flags = 0;
rbuffer->b.user_ptr = ptr;
rbuffer->bo = NULL;
rbuffer->bo_size = 0;
return &rbuffer->b.b.b;
}
struct pipe_resource *r600_buffer_from_handle(struct pipe_screen *screen,
@ -241,22 +239,22 @@ struct pipe_resource *r600_buffer_from_handle(struct pipe_screen *screen,
void r600_upload_index_buffer(struct r600_pipe_context *rctx, struct r600_drawl *draw)
{
struct r600_resource_buffer *rbuffer = r600_buffer(draw->index_buffer);
struct r600_resource *rbuffer = r600_resource(draw->index_buffer);
boolean flushed;
u_upload_data(rctx->vbuf_mgr->uploader, 0,
draw->info.count * draw->index_size,
rbuffer->r.b.user_ptr,
rbuffer->b.user_ptr,
&draw->index_buffer_offset,
&draw->index_buffer, &flushed);
}
void r600_upload_const_buffer(struct r600_pipe_context *rctx, struct r600_resource_buffer **rbuffer,
void r600_upload_const_buffer(struct r600_pipe_context *rctx, struct r600_resource **rbuffer,
uint32_t *const_offset)
{
if ((*rbuffer)->r.b.user_ptr) {
uint8_t *ptr = (*rbuffer)->r.b.user_ptr;
unsigned size = (*rbuffer)->r.b.b.b.width0;
if ((*rbuffer)->b.user_ptr) {
uint8_t *ptr = (*rbuffer)->b.user_ptr;
unsigned size = (*rbuffer)->b.b.b.width0;
boolean flushed;
*rbuffer = NULL;

2
src/gallium/drivers/r600/r600_pipe.c
View file

@ -745,7 +745,7 @@ struct pipe_screen *r600_screen_create(struct radeon_winsys *ws)
util_format_s3tc_init();
util_slab_create(&rscreen->pool_buffers,
sizeof(struct r600_resource_buffer), 64,
sizeof(struct r600_resource), 64,
UTIL_SLAB_SINGLETHREADED);
pipe_mutex_init(rscreen->mutex_num_contexts);

19
src/gallium/drivers/r600/r600_resource.h
View file

@ -79,14 +79,6 @@ struct r600_resource_texture {
#define R600_TEX_IS_TILED(tex, level) ((tex)->array_mode[level] != V_038000_ARRAY_LINEAR_GENERAL && (tex)->array_mode[level] != V_038000_ARRAY_LINEAR_ALIGNED)
#define R600_BUFFER_MAGIC 0xabcd1600
/* XXX this could be removed */
struct r600_resource_buffer {
struct r600_resource r;
uint32_t magic;
};
struct r600_surface {
struct pipe_surface base;
unsigned aligned_height;
@ -101,14 +93,9 @@ struct pipe_resource *r600_texture_from_handle(struct pipe_screen *screen,
const struct pipe_resource *base,
struct winsys_handle *whandle);
/* r600_buffer */
static INLINE struct r600_resource_buffer *r600_buffer(struct pipe_resource *buffer)
static INLINE struct r600_resource *r600_resource(struct pipe_resource *r)
{
if (buffer) {
assert(((struct r600_resource_buffer *)buffer)->magic == R600_BUFFER_MAGIC);
return (struct r600_resource_buffer *)buffer;
}
return NULL;
return (struct r600_resource*)r;
}
int r600_texture_depth_flush(struct pipe_context *ctx, struct pipe_resource *texture, boolean just_create);
@ -128,6 +115,6 @@ void r600_texture_transfer_unmap(struct pipe_context *ctx,
struct r600_pipe_context;
void r600_upload_const_buffer(struct r600_pipe_context *rctx, struct r600_resource_buffer **rbuffer, uint32_t *offset);
void r600_upload_const_buffer(struct r600_pipe_context *rctx, struct r600_resource **rbuffer, uint32_t *offset);
#endif

16
src/gallium/drivers/r600/r600_state_common.c
View file

@ -406,7 +406,7 @@ void r600_set_constant_buffer(struct pipe_context *ctx, uint shader, uint index,
struct pipe_resource *buffer)
{
struct r600_pipe_context *rctx = (struct r600_pipe_context *)ctx;
struct r600_resource_buffer *rbuffer = r600_buffer(buffer);
struct r600_resource *rbuffer = r600_resource(buffer);
struct r600_pipe_resource_state *rstate;
uint32_t offset;
@ -428,7 +428,7 @@ void r600_set_constant_buffer(struct pipe_context *ctx, uint shader, uint index,
0xFFFFFFFF, NULL, 0);
r600_pipe_state_add_reg(&rctx->vs_const_buffer,
R_028980_ALU_CONST_CACHE_VS_0,
offset >> 8, 0xFFFFFFFF, rbuffer->r.bo, RADEON_USAGE_READ);
offset >> 8, 0xFFFFFFFF, rbuffer->bo, RADEON_USAGE_READ);
r600_context_pipe_state_set(&rctx->ctx, &rctx->vs_const_buffer);
rstate = &rctx->vs_const_buffer_resource[index];
@ -441,10 +441,10 @@ void r600_set_constant_buffer(struct pipe_context *ctx, uint shader, uint index,
}
if (rctx->chip_class >= EVERGREEN) {
evergreen_pipe_mod_buffer_resource(rstate, &rbuffer->r, offset, 16, RADEON_USAGE_READ);
evergreen_pipe_mod_buffer_resource(rstate, rbuffer, offset, 16, RADEON_USAGE_READ);
evergreen_context_pipe_state_set_vs_resource(&rctx->ctx, rstate, index);
} else {
r600_pipe_mod_buffer_resource(rstate, &rbuffer->r, offset, 16, RADEON_USAGE_READ);
r600_pipe_mod_buffer_resource(rstate, rbuffer, offset, 16, RADEON_USAGE_READ);
r600_context_pipe_state_set_vs_resource(&rctx->ctx, rstate, index);
}
break;
@ -456,7 +456,7 @@ void r600_set_constant_buffer(struct pipe_context *ctx, uint shader, uint index,
0xFFFFFFFF, NULL, 0);
r600_pipe_state_add_reg(&rctx->ps_const_buffer,
R_028940_ALU_CONST_CACHE_PS_0,
offset >> 8, 0xFFFFFFFF, rbuffer->r.bo, RADEON_USAGE_READ);
offset >> 8, 0xFFFFFFFF, rbuffer->bo, RADEON_USAGE_READ);
r600_context_pipe_state_set(&rctx->ctx, &rctx->ps_const_buffer);
rstate = &rctx->ps_const_buffer_resource[index];
@ -468,10 +468,10 @@ void r600_set_constant_buffer(struct pipe_context *ctx, uint shader, uint index,
}
}
if (rctx->chip_class >= EVERGREEN) {
evergreen_pipe_mod_buffer_resource(rstate, &rbuffer->r, offset, 16, RADEON_USAGE_READ);
evergreen_pipe_mod_buffer_resource(rstate, rbuffer, offset, 16, RADEON_USAGE_READ);
evergreen_context_pipe_state_set_ps_resource(&rctx->ctx, rstate, index);
} else {
r600_pipe_mod_buffer_resource(rstate, &rbuffer->r, offset, 16, RADEON_USAGE_READ);
r600_pipe_mod_buffer_resource(rstate, rbuffer, offset, 16, RADEON_USAGE_READ);
r600_context_pipe_state_set_ps_resource(&rctx->ctx, rstate, index);
}
break;
@ -480,7 +480,7 @@ void r600_set_constant_buffer(struct pipe_context *ctx, uint shader, uint index,
return;
}
if (buffer != &rbuffer->r.b.b.b)
if (buffer != &rbuffer->b.b.b)
pipe_resource_reference((struct pipe_resource**)&rbuffer, NULL);
}