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i965: Make TES inputs match TCS outputs.

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Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
This commit is contained in:
Kenneth Graunke 2015-12-09 21:42:56 -08:00
parent 4fac950010
commit 9f0944d15b
1 changed files with 11 additions and 0 deletions
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11
src/mesa/drivers/dri/i965/brw_nir.c
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@ -636,6 +636,17 @@ brw_create_nir(struct brw_context *brw,
/* First, lower the GLSL IR or Mesa IR to NIR */
if (shader_prog) {
nir = glsl_to_nir(shader_prog, stage, options);
if (nir->stage == MESA_SHADER_TESS_EVAL &&
shader_prog->_LinkedShaders[MESA_SHADER_TESS_CTRL]) {
const struct gl_program *tcs =
shader_prog->_LinkedShaders[MESA_SHADER_TESS_CTRL]->Program;
/* Work around the TCS having bonus outputs used as shared memory
* segments, which makes OutputsWritten not match InputsRead
*/
nir->info.inputs_read = tcs->OutputsWritten;
nir->info.patch_inputs_read = tcs->PatchOutputsWritten;
}
} else {
nir = prog_to_nir(prog, options);
OPT_V(nir_convert_to_ssa); /* turn registers into SSA */