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nir: Use nir_def_as_* in more places

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Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36746>
This commit is contained in:
Konstantin Seurer 2025-08-12 21:45:08 +02:00 • committed by Marge Bot
parent 906b541567
commit 9df7b48d2f
24 changed files with 112 additions and 119 deletions
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2
src/amd/common/nir/ac_nir_lower_resinfo.c
View file

@ -260,7 +260,7 @@ static bool lower_resinfo(nir_builder *b, nir_instr *instr, void *data)
case nir_intrinsic_image_deref_size:
case nir_intrinsic_image_deref_samples:
type = nir_instr_as_deref(intr->src[0].ssa->parent_instr)->type;
type = nir_def_as_deref(intr->src[0].ssa)->type;
dim = glsl_get_sampler_dim(type);
is_array = glsl_sampler_type_is_array(type);
desc = nir_image_deref_descriptor_amd(b, dim == GLSL_SAMPLER_DIM_BUF ? 4 : 8,

2
src/amd/compiler/instruction_selection/aco_isel_setup.cpp
View file

@ -160,7 +160,7 @@ apply_nuw_to_ssa(isel_context* ctx, nir_def* ssa)
if (!nir_scalar_is_alu(scalar) || nir_scalar_alu_op(scalar) != nir_op_iadd)
return;
nir_alu_instr* add = nir_instr_as_alu(ssa->parent_instr);
nir_alu_instr* add = nir_def_as_alu(ssa);
if (add->no_unsigned_wrap)
return;

2
src/amd/compiler/instruction_selection/aco_select_nir.cpp
View file

@ -737,7 +737,7 @@ get_phi_operand(isel_context* ctx, nir_def* ssa, RegClass rc)
if (ssa->parent_instr->type == nir_instr_type_undef) {
return Operand(rc);
} else if (ssa->bit_size == 1 && ssa->parent_instr->type == nir_instr_type_load_const) {
bool val = nir_instr_as_load_const(ssa->parent_instr)->value[0].b;
bool val = nir_def_as_load_const(ssa)->value[0].b;
return Operand::c32_or_c64(val ? -1 : 0, ctx->program->lane_mask == s2);
} else {
return Operand(tmp);

4
src/amd/compiler/instruction_selection/aco_select_nir_alu.cpp
View file

@ -322,9 +322,9 @@ emit_pk_shift(isel_context* ctx, nir_alu_instr* instr, aco_opcode op, Temp dst)
} else if (nir_scalar_is_alu(s) &&
(nir_scalar_alu_op(s) == nir_op_u2u32 ||
nir_scalar_alu_op(s) == nir_op_i2i32) &&
nir_instr_as_alu(s.def->parent_instr)->src[0].src.ssa->bit_size == 16) {
nir_def_as_alu(s.def)->src[0].src.ssa->bit_size == 16) {
assert(s.def->num_components == 1);
Temp comp = get_alu_src(ctx, nir_instr_as_alu(s.def->parent_instr)->src[0]);
Temp comp = get_alu_src(ctx, nir_def_as_alu(s.def)->src[0]);
comps[i] = Operand(emit_extract_vector(ctx, comp, 0, v2b));
} else {
Temp vec = get_ssa_temp(ctx, instr->src[1].src.ssa);

3
src/asahi/vulkan/hk_cmd_meta.c
View file

@ -549,8 +549,7 @@ build_image_copy_shader(const struct vk_meta_image_copy_key *key)
value1 = nir_txf(b, src_coord, .texture_deref = deref);
}
nir_instr_as_tex(value1->parent_instr)->backend_flags =
AGX_TEXTURE_FLAG_NO_CLAMP;
nir_def_as_tex(value1)->backend_flags = AGX_TEXTURE_FLAG_NO_CLAMP;
/* Munge according to the implicit conversions so we get a bit copy */
if (key->src_format != key->dst_format) {

60
src/compiler/nir/nir.h
View file

@ -2848,32 +2848,6 @@ NIR_DEFINE_CAST(nir_instr_as_parallel_copy, nir_instr,
nir_parallel_copy_instr, instr,
type, nir_instr_type_parallel_copy)
#define NIR_DEFINE_SRC_AS_CONST(type, suffix) \
static inline type \
nir_src_comp_as_##suffix(nir_src src, unsigned comp) \
{ \
assert(nir_src_is_const(src)); \
nir_load_const_instr *load = \
nir_instr_as_load_const(src.ssa->parent_instr); \
assert(comp < load->def.num_components); \
return nir_const_value_as_##suffix(load->value[comp], \
load->def.bit_size); \
} \
\
static inline type \
nir_src_as_##suffix(nir_src src) \
{ \
assert(nir_src_num_components(src) == 1); \
return nir_src_comp_as_##suffix(src, 0); \
}
NIR_DEFINE_SRC_AS_CONST(int64_t, int)
NIR_DEFINE_SRC_AS_CONST(uint64_t, uint)
NIR_DEFINE_SRC_AS_CONST(bool, bool)
NIR_DEFINE_SRC_AS_CONST(double, float)
#undef NIR_DEFINE_SRC_AS_CONST
#define NIR_DEFINE_DEF_AS_INSTR(type, suffix) \
static inline type *nir_def_as_##suffix(const nir_def *def) \
{ \
@ -2889,6 +2863,32 @@ NIR_DEFINE_DEF_AS_INSTR(nir_load_const_instr, load_const)
#undef NIR_DEFINE_DEF_AS_INSTR
#define NIR_DEFINE_SRC_AS_CONST(type, suffix) \
static inline type \
nir_src_comp_as_##suffix(nir_src src, unsigned comp) \
{ \
assert(nir_src_is_const(src)); \
nir_load_const_instr *load = \
nir_def_as_load_const(src.ssa); \
assert(comp < load->def.num_components); \
return nir_const_value_as_##suffix(load->value[comp], \
load->def.bit_size); \
} \
\
static inline type \
nir_src_as_##suffix(nir_src src) \
{ \
assert(nir_src_num_components(src) == 1); \
return nir_src_comp_as_##suffix(src, 0); \
}
NIR_DEFINE_SRC_AS_CONST(int64_t, int)
NIR_DEFINE_SRC_AS_CONST(uint64_t, uint)
NIR_DEFINE_SRC_AS_CONST(bool, bool)
NIR_DEFINE_SRC_AS_CONST(double, float)
#undef NIR_DEFINE_SRC_AS_CONST
typedef struct nir_scalar {
nir_def *def;
unsigned comp;
@ -2938,7 +2938,7 @@ nir_scalar_is_alu(nir_scalar s)
static inline nir_op
nir_scalar_alu_op(nir_scalar s)
{
return nir_instr_as_alu(s.def->parent_instr)->op;
return nir_def_as_alu(s.def)->op;
}
static inline bool
@ -2950,7 +2950,7 @@ nir_scalar_is_intrinsic(nir_scalar s)
static inline nir_intrinsic_op
nir_scalar_intrinsic_op(nir_scalar s)
{
return nir_instr_as_intrinsic(s.def->parent_instr)->intrinsic;
return nir_def_as_intrinsic(s.def)->intrinsic;
}
static inline nir_scalar
@ -6562,7 +6562,7 @@ static inline nir_intrinsic_instr *
nir_reg_get_decl(nir_def *reg)
{
assert(reg->parent_instr->type == nir_instr_type_intrinsic);
nir_intrinsic_instr *decl = nir_instr_as_intrinsic(reg->parent_instr);
nir_intrinsic_instr *decl = nir_def_as_intrinsic(reg);
assert(decl->intrinsic == nir_intrinsic_decl_reg);
return decl;
@ -6656,7 +6656,7 @@ nir_load_reg_for_def(const nir_def *def)
if (def->parent_instr->type != nir_instr_type_intrinsic)
return NULL;
nir_intrinsic_instr *intr = nir_instr_as_intrinsic(def->parent_instr);
nir_intrinsic_instr *intr = nir_def_as_intrinsic(def);
if (!nir_is_load_reg(intr))
return NULL;

2
src/compiler/nir/nir_lower_atomics.c
View file

@ -80,7 +80,7 @@ build_atomic(nir_builder *b, nir_intrinsic_instr *intr)
nir_def *before = &phi->def;
nir_def *expected = nir_build_alu2(
b, nir_atomic_op_to_alu(nir_intrinsic_atomic_op(intr)), before, data);
nir_alu_instr *op = nir_instr_as_alu(expected->parent_instr);
nir_alu_instr *op = nir_def_as_alu(expected);
op->exact = true;
op->fp_fast_math = 0;
switch (intr->intrinsic) {

11
src/compiler/nir/nir_opt_varyings.c
View file

@ -3580,8 +3580,7 @@ try_move_postdominator(struct linkage_info *linkage,
}
if (baryc != first_load->src[0].ssa) {
nir_intrinsic_instr *baryc_i =
nir_instr_as_intrinsic(baryc->parent_instr);
nir_intrinsic_instr *baryc_i = nir_def_as_intrinsic(baryc);
if (alu_interp == FLAG_INTERP_LINEAR_PIXEL ||
alu_interp == FLAG_INTERP_LINEAR_CENTROID ||
@ -3723,7 +3722,7 @@ try_move_postdominator(struct linkage_info *linkage,
list_for_each_entry(struct list_node, iter, &slot->consumer.loads,
head) {
assert(i < 3);
iter->instr = nir_instr_as_intrinsic(new_tes_loads[i]->parent_instr);
iter->instr = nir_def_as_intrinsic(new_tes_loads[i]);
i++;
}
@ -3731,11 +3730,11 @@ try_move_postdominator(struct linkage_info *linkage,
assert(postdom_def->bit_size != 1);
slot->consumer.tes_interp_load =
nir_instr_as_alu(new_input->parent_instr);
nir_def_as_alu(new_input);
} else {
assert(list_is_singular(&slot->consumer.loads));
list_first_entry(&slot->consumer.loads, struct list_node, head)->instr =
nir_instr_as_intrinsic(new_input->parent_instr);
nir_def_as_intrinsic(new_input);
/* The input is a bigger type even if the post-dominator is boolean. */
if (postdom_def->bit_size == 1)
@ -4303,7 +4302,7 @@ relocate_slot(struct linkage_info *linkage, struct scalar_slot *slot,
.dest_type = nir_intrinsic_dest_type(intr));
nir_def_rewrite_uses(&intr->def, load);
iter->instr = nir_instr_as_intrinsic(load->parent_instr);
iter->instr = nir_def_as_intrinsic(load);
nir_instr_remove(&intr->instr);
*progress |= nir_progress_consumer;

5
src/compiler/nir/tests/format_convert_tests.cpp
View file

@ -235,7 +235,7 @@ TEST_P(rgba, pack)
nir_def *packed_ssa = uses[i]->src[0].ssa;
const nir_const_value *packed =
nir_instr_as_load_const(packed_ssa->parent_instr)->value;
nir_def_as_load_const(packed_ssa)->value;
if (packed_ssa->num_components == 1) {
switch (packed_ssa->bit_size) {
case 8:
@ -299,8 +299,7 @@ TEST_P(rgba, unpack)
assert(rgba_ssa->bit_size == 32);
assert(rgba_ssa->num_components == 4);
const nir_const_value *rgba =
nir_instr_as_load_const(rgba_ssa->parent_instr)->value;
const nir_const_value *rgba = nir_def_as_load_const(rgba_ssa)->value;
if (util_format_is_pure_integer(format)) {
uint32_t *exp_u32 = (uint32_t *)expected;

40
src/compiler/nir/tests/load_store_vectorizer_tests.cpp
View file

@ -237,7 +237,7 @@ nir_load_store_vectorize_test::create_indirect_load(
}
nir_builder_instr_insert(b, &load->instr);
nir_alu_instr *mov = nir_instr_as_alu(nir_mov(b, &load->def)->parent_instr);
nir_alu_instr *mov = nir_def_as_alu(nir_mov(b, &load->def));
movs[id] = mov;
loads[id] = &mov->src[0];
@ -304,7 +304,7 @@ void nir_load_store_vectorize_test::create_shared_load(
nir_deref_instr *deref, uint32_t id, unsigned bit_size, unsigned components)
{
nir_def *load = nir_load_deref(b, deref);
nir_alu_instr *mov = nir_instr_as_alu(nir_mov(b, load)->parent_instr);
nir_alu_instr *mov = nir_def_as_alu(nir_mov(b, load));
movs[id] = mov;
loads[id] = &mov->src[0];
}
@ -616,9 +616,9 @@ TEST_F(nir_load_store_vectorize_test, ssbo_load_adjacent_indirect_neg_stride)
/* nir_opt_algebraic optimizes the imul */
ASSERT_TRUE(test_alu(load->src[1].ssa->parent_instr, nir_op_ineg));
nir_def *offset = nir_instr_as_alu(load->src[1].ssa->parent_instr)->src[0].src.ssa;
nir_def *offset = nir_def_as_alu(load->src[1].ssa)->src[0].src.ssa;
ASSERT_TRUE(test_alu(offset->parent_instr, nir_op_ishl));
nir_alu_instr *shl = nir_instr_as_alu(offset->parent_instr);
nir_alu_instr *shl = nir_def_as_alu(offset);
ASSERT_EQ(shl->src[0].src.ssa, inv_plus_one);
ASSERT_EQ(nir_src_as_uint(shl->src[1].src), 2);
}
@ -732,7 +732,7 @@ TEST_F(nir_load_store_vectorize_test, ssbo_store_adjacent)
nir_def *val = store->src[0].ssa;
ASSERT_EQ(val->bit_size, 32);
ASSERT_EQ(val->num_components, 2);
nir_const_value *cv = nir_instr_as_load_const(val->parent_instr)->value;
nir_const_value *cv = nir_def_as_load_const(val)->value;
ASSERT_EQ(nir_const_value_as_uint(cv[0], 32), 0x10);
ASSERT_EQ(nir_const_value_as_uint(cv[1], 32), 0x20);
}
@ -755,7 +755,7 @@ TEST_F(nir_load_store_vectorize_test, ssbo_store_intersecting)
nir_def *val = store->src[0].ssa;
ASSERT_EQ(val->bit_size, 32);
ASSERT_EQ(val->num_components, 3);
nir_const_value *cv = nir_instr_as_load_const(val->parent_instr)->value;
nir_const_value *cv = nir_def_as_load_const(val)->value;
ASSERT_EQ(nir_const_value_as_uint(cv[0], 32), 0x10);
ASSERT_EQ(nir_const_value_as_uint(cv[1], 32), 0x20);
ASSERT_EQ(nir_const_value_as_uint(cv[2], 32), 0x21);
@ -958,10 +958,10 @@ TEST_F(nir_load_store_vectorize_test, ssbo_load_adjacent_8_8_16)
ASSERT_EQ(val->bit_size, 16);
ASSERT_EQ(val->num_components, 1);
ASSERT_TRUE(test_alu(val->parent_instr, nir_op_ior));
nir_def *low = nir_instr_as_alu(val->parent_instr)->src[0].src.ssa;
nir_def *high = nir_instr_as_alu(val->parent_instr)->src[1].src.ssa;
nir_def *low = nir_def_as_alu(val)->src[0].src.ssa;
nir_def *high = nir_def_as_alu(val)->src[1].src.ssa;
ASSERT_TRUE(test_alu(high->parent_instr, nir_op_ishl));
high = nir_instr_as_alu(high->parent_instr)->src[0].src.ssa;
high = nir_def_as_alu(high)->src[0].src.ssa;
ASSERT_TRUE(test_alu(low->parent_instr, nir_op_u2u16));
ASSERT_TRUE(test_alu(high->parent_instr, nir_op_u2u16));
ASSERT_TRUE(test_alu_def(low->parent_instr, 0, &load->def, 2));
@ -990,7 +990,7 @@ TEST_F(nir_load_store_vectorize_test, ssbo_load_adjacent_32_32_64)
ASSERT_EQ(val->bit_size, 64);
ASSERT_EQ(val->num_components, 1);
ASSERT_TRUE(test_alu(val->parent_instr, nir_op_pack_64_2x32));
nir_alu_instr *pack = nir_instr_as_alu(val->parent_instr);
nir_alu_instr *pack = nir_def_as_alu(val);
EXPECT_INSTR_SWIZZLES(pack, load, "zw");
}
@ -1017,14 +1017,14 @@ TEST_F(nir_load_store_vectorize_test, ssbo_load_adjacent_32_32_64_64)
ASSERT_EQ(val->bit_size, 64);
ASSERT_EQ(val->num_components, 1);
ASSERT_TRUE(test_alu(val->parent_instr, nir_op_mov));
nir_alu_instr *mov = nir_instr_as_alu(val->parent_instr);
nir_alu_instr *mov = nir_def_as_alu(val);
EXPECT_INSTR_SWIZZLES(mov, load, "y");
val = loads[0x1]->src.ssa;
ASSERT_EQ(val->bit_size, 32);
ASSERT_EQ(val->num_components, 2);
ASSERT_TRUE(test_alu(val->parent_instr, nir_op_unpack_64_2x32));
nir_alu_instr *unpack = nir_instr_as_alu(val->parent_instr);
nir_alu_instr *unpack = nir_def_as_alu(val);
EXPECT_INSTR_SWIZZLES(unpack, load, "x");
}
@ -1050,7 +1050,7 @@ TEST_F(nir_load_store_vectorize_test, ssbo_load_intersecting_32_32_64)
ASSERT_EQ(val->bit_size, 64);
ASSERT_EQ(val->num_components, 1);
ASSERT_TRUE(test_alu(val->parent_instr, nir_op_pack_64_2x32));
nir_alu_instr *pack = nir_instr_as_alu(val->parent_instr);
nir_alu_instr *pack = nir_def_as_alu(val);
EXPECT_INSTR_SWIZZLES(pack, load, "yz");
}
@ -1073,7 +1073,7 @@ TEST_F(nir_load_store_vectorize_test, ssbo_store_adjacent_8_8_16)
nir_def *val = store->src[0].ssa;
ASSERT_EQ(val->bit_size, 8);
ASSERT_EQ(val->num_components, 4);
nir_const_value *cv = nir_instr_as_load_const(val->parent_instr)->value;
nir_const_value *cv = nir_def_as_load_const(val)->value;
ASSERT_EQ(nir_const_value_as_uint(cv[0], 8), 0x10);
ASSERT_EQ(nir_const_value_as_uint(cv[1], 8), 0x20);
ASSERT_EQ(nir_const_value_as_uint(cv[2], 8), 0x30);
@ -1098,7 +1098,7 @@ TEST_F(nir_load_store_vectorize_test, ssbo_store_adjacent_32_32_64)
nir_def *val = store->src[0].ssa;
ASSERT_EQ(val->bit_size, 32);
ASSERT_EQ(val->num_components, 4);
nir_const_value *cv = nir_instr_as_load_const(val->parent_instr)->value;
nir_const_value *cv = nir_def_as_load_const(val)->value;
ASSERT_EQ(nir_const_value_as_uint(cv[0], 32), 0x10);
ASSERT_EQ(nir_const_value_as_uint(cv[1], 32), 0x11);
ASSERT_EQ(nir_const_value_as_uint(cv[2], 32), 0x20);
@ -1124,7 +1124,7 @@ TEST_F(nir_load_store_vectorize_test, ssbo_store_adjacent_32_32_64_64)
nir_def *val = store->src[0].ssa;
ASSERT_EQ(val->bit_size, 64);
ASSERT_EQ(val->num_components, 3);
nir_const_value *cv = nir_instr_as_load_const(val->parent_instr)->value;
nir_const_value *cv = nir_def_as_load_const(val)->value;
ASSERT_EQ(nir_const_value_as_uint(cv[0], 64), 0x1100000010ull);
ASSERT_EQ(nir_const_value_as_uint(cv[1], 64), 0x20);
ASSERT_EQ(nir_const_value_as_uint(cv[2], 64), 0x30);
@ -1148,7 +1148,7 @@ TEST_F(nir_load_store_vectorize_test, ssbo_store_intersecting_32_32_64)
nir_def *val = store->src[0].ssa;
ASSERT_EQ(val->bit_size, 32);
ASSERT_EQ(val->num_components, 3);
nir_const_value *cv = nir_instr_as_load_const(val->parent_instr)->value;
nir_const_value *cv = nir_def_as_load_const(val)->value;
ASSERT_EQ(nir_const_value_as_uint(cv[0], 32), 0x10);
ASSERT_EQ(nir_const_value_as_uint(cv[1], 32), 0x20);
ASSERT_EQ(nir_const_value_as_uint(cv[2], 32), 0x0);
@ -1185,7 +1185,7 @@ TEST_F(nir_load_store_vectorize_test, ssbo_store_identical_wrmask)
nir_def *val = store->src[0].ssa;
ASSERT_EQ(val->bit_size, 32);
ASSERT_EQ(val->num_components, 4);
nir_const_value *cv = nir_instr_as_load_const(val->parent_instr)->value;
nir_const_value *cv = nir_def_as_load_const(val)->value;
ASSERT_EQ(nir_const_value_as_uint(cv[0], 32), 0x10);
ASSERT_EQ(nir_const_value_as_uint(cv[1], 32), 0x21);
ASSERT_EQ(nir_const_value_as_uint(cv[2], 32), 0x22);
@ -1536,7 +1536,7 @@ TEST_F(nir_load_store_vectorize_test, shared_store_adjacent)
nir_def *val = store->src[1].ssa;
ASSERT_EQ(val->bit_size, 32);
ASSERT_EQ(val->num_components, 2);
nir_const_value *cv = nir_instr_as_load_const(val->parent_instr)->value;
nir_const_value *cv = nir_def_as_load_const(val)->value;
ASSERT_EQ(nir_const_value_as_uint(cv[0], 32), 0x10);
ASSERT_EQ(nir_const_value_as_uint(cv[1], 32), 0x20);
@ -1711,7 +1711,7 @@ TEST_F(nir_load_store_vectorize_test, DISABLED_ssbo_alias4)
/* TODO: try to combine these loads */
nir_def *index_base = nir_load_local_invocation_index(b);
nir_def *offset = nir_iadd_imm(b, nir_imul_imm(b, index_base, 16), 16);
nir_instr_as_alu(offset->parent_instr)->no_unsigned_wrap = true;
nir_def_as_alu(offset)->no_unsigned_wrap = true;
create_indirect_load(nir_var_mem_ssbo, 0, offset, 0x1);
create_store(nir_var_mem_ssbo, 0, 0, 0x2);
create_indirect_load(nir_var_mem_ssbo, 0, offset, 0x3);

12
src/compiler/nir/tests/negative_equal_tests.cpp
View file

@ -138,7 +138,7 @@ TEST_F(alu_srcs_negative_equal_test, trivial_float)
nir_def *negative_two = nir_imm_float(&bld, -2.0f);
nir_def *result = nir_fadd(&bld, two, negative_two);
nir_alu_instr *instr = nir_instr_as_alu(result->parent_instr);
nir_alu_instr *instr = nir_def_as_alu(result);
ASSERT_NE((void *) 0, instr);
EXPECT_TRUE(nir_alu_srcs_negative_equal(instr, instr, 0, 1));
@ -152,7 +152,7 @@ TEST_F(alu_srcs_negative_equal_test, trivial_int)
nir_def *negative_two = nir_imm_int(&bld, -2);
nir_def *result = nir_iadd(&bld, two, negative_two);
nir_alu_instr *instr = nir_instr_as_alu(result->parent_instr);
nir_alu_instr *instr = nir_def_as_alu(result);
ASSERT_NE((void *) 0, instr);
EXPECT_TRUE(nir_alu_srcs_negative_equal(instr, instr, 0, 1));
@ -172,7 +172,7 @@ TEST_F(alu_srcs_negative_equal_test, trivial_negation_float)
nir_def *result = nir_fadd(&bld, two_plus_two, negation);
nir_alu_instr *instr = nir_instr_as_alu(result->parent_instr);
nir_alu_instr *instr = nir_def_as_alu(result);
ASSERT_NE((void *) 0, instr);
EXPECT_TRUE(nir_alu_srcs_negative_equal(instr, instr, 0, 1));
@ -192,7 +192,7 @@ TEST_F(alu_srcs_negative_equal_test, trivial_negation_int)
nir_def *result = nir_iadd(&bld, two_plus_two, negation);
nir_alu_instr *instr = nir_instr_as_alu(result->parent_instr);
nir_alu_instr *instr = nir_def_as_alu(result);
ASSERT_NE((void *) 0, instr);
EXPECT_TRUE(nir_alu_srcs_negative_equal(instr, instr, 0, 1));
@ -216,7 +216,7 @@ TEST_F(alu_srcs_negative_equal_test, full_type ## _self) \
result = nir_fadd(&bld, a, a); \
else \
result = nir_iadd(&bld, a, a); \
nir_alu_instr *instr = nir_instr_as_alu(result->parent_instr); \
nir_alu_instr *instr = nir_def_as_alu(result); \
ASSERT_NE((void *) 0, instr); \
EXPECT_FALSE(nir_alu_srcs_negative_equal(instr, instr, 0, 0)); \
EXPECT_FALSE(nir_alu_srcs_negative_equal(instr, instr, 0, 1)); \
@ -256,7 +256,7 @@ TEST_F(alu_srcs_negative_equal_test, full_type ## _trivially_true) \
result = nir_fadd(&bld, a, b); \
else \
result = nir_iadd(&bld, a, b); \
nir_alu_instr *instr = nir_instr_as_alu(result->parent_instr); \
nir_alu_instr *instr = nir_def_as_alu(result); \
ASSERT_NE((void *) 0, instr); \
EXPECT_FALSE(nir_alu_srcs_negative_equal(instr, instr, 0, 0)); \
EXPECT_TRUE(nir_alu_srcs_negative_equal(instr, instr, 0, 1)); \

32
src/compiler/nir/tests/opt_shrink_vectors_tests.cpp
View file

@ -87,7 +87,7 @@ TEST_F(nir_opt_shrink_vectors_test, opt_shrink_vectors_load_const_trailing_compo
nir_def *imm_vec = nir_imm_vec4(b, 1.0, 2.0, 3.0, 4.0);
nir_def *alu_result = nir_build_alu1(b, nir_op_mov, imm_vec);
nir_alu_instr *alu_instr = nir_instr_as_alu(alu_result->parent_instr);
nir_alu_instr *alu_instr = nir_def_as_alu(alu_result);
set_swizzle(&alu_instr->src[0], "x");
alu_result->num_components = 1;
@ -98,7 +98,7 @@ TEST_F(nir_opt_shrink_vectors_test, opt_shrink_vectors_load_const_trailing_compo
nir_validate_shader(b->shader, NULL);
ASSERT_TRUE(imm_vec->num_components == 1);
nir_load_const_instr * imm_vec_instr = nir_instr_as_load_const(imm_vec->parent_instr);
nir_load_const_instr *imm_vec_instr = nir_def_as_load_const(imm_vec);
ASSERT_TRUE(nir_const_value_as_float(imm_vec_instr->value[0], 32) == 1.0);
ASSERT_FALSE(nir_opt_shrink_vectors(b->shader, true));
@ -119,12 +119,12 @@ TEST_F(nir_opt_shrink_vectors_test, opt_shrink_vectors_alu_trailing_component_on
*/
nir_def *alu_result = nir_build_alu1(b, nir_op_mov, in_def);
nir_alu_instr *alu_instr = nir_instr_as_alu(alu_result->parent_instr);
nir_alu_instr *alu_instr = nir_def_as_alu(alu_result);
alu_result->num_components = 4;
set_swizzle(&alu_instr->src[0], "xyxx");
nir_def *alu2_result = nir_build_alu1(b, nir_op_mov, alu_result);
nir_alu_instr *alu2_instr = nir_instr_as_alu(alu2_result->parent_instr);
nir_alu_instr *alu2_instr = nir_def_as_alu(alu2_result);
set_swizzle(&alu2_instr->src[0], "x");
alu2_result->num_components = 1;
@ -158,13 +158,13 @@ TEST_F(nir_opt_shrink_vectors_test, opt_shrink_vectors_simple)
nir_def *imm_vec = nir_imm_vec4(b, 3.0, 1.0, 2.0, 1.0);
nir_def *alu_result = nir_build_alu2(b, nir_op_fadd, in_def, imm_vec);
nir_alu_instr *alu_instr = nir_instr_as_alu(alu_result->parent_instr);
nir_alu_instr *alu_instr = nir_def_as_alu(alu_result);
alu_result->num_components = 4;
set_swizzle(&alu_instr->src[0], "xxxy");
set_swizzle(&alu_instr->src[1], "ywyz");
nir_def *alu2_result = nir_build_alu2(b, nir_op_fdot3, alu_result, alu_result);
nir_alu_instr *alu2_instr = nir_instr_as_alu(alu2_result->parent_instr);
nir_alu_instr *alu2_instr = nir_def_as_alu(alu2_result);
set_swizzle(&alu2_instr->src[0], "xzw");
set_swizzle(&alu2_instr->src[1], "xzw");
@ -175,7 +175,7 @@ TEST_F(nir_opt_shrink_vectors_test, opt_shrink_vectors_simple)
nir_validate_shader(b->shader, NULL);
ASSERT_TRUE(imm_vec->num_components == 2);
nir_load_const_instr * imm_vec_instr = nir_instr_as_load_const(imm_vec->parent_instr);
nir_load_const_instr *imm_vec_instr = nir_def_as_load_const(imm_vec);
ASSERT_TRUE(nir_const_value_as_float(imm_vec_instr->value[0], 32) == 1.0);
ASSERT_TRUE(nir_const_value_as_float(imm_vec_instr->value[1], 32) == 2.0);
@ -223,13 +223,13 @@ TEST_F(nir_opt_shrink_vectors_test, opt_shrink_vectors_vec8)
nir_def *imm_vec = nir_build_imm(b, 8, 32, v);
nir_def *alu_result = nir_build_alu2(b, nir_op_fadd, in_def, imm_vec);
nir_alu_instr *alu_instr = nir_instr_as_alu(alu_result->parent_instr);
nir_alu_instr *alu_instr = nir_def_as_alu(alu_result);
alu_result->num_components = 8;
set_swizzle(&alu_instr->src[0], "xxxxxxxy");
set_swizzle(&alu_instr->src[1], "afhdefgh");
nir_def *alu2_result = nir_build_alu2(b, nir_op_fdot8, alu_result, alu_result);
nir_alu_instr *alu2_instr = nir_instr_as_alu(alu2_result->parent_instr);
nir_alu_instr *alu2_instr = nir_def_as_alu(alu2_result);
set_swizzle(&alu2_instr->src[0], "accdefgh");
set_swizzle(&alu2_instr->src[1], "accdefgh");
@ -240,7 +240,7 @@ TEST_F(nir_opt_shrink_vectors_test, opt_shrink_vectors_vec8)
nir_validate_shader(b->shader, NULL);
ASSERT_TRUE(imm_vec->num_components == 8);
nir_load_const_instr * imm_vec_instr = nir_instr_as_load_const(imm_vec->parent_instr);
nir_load_const_instr *imm_vec_instr = nir_def_as_load_const(imm_vec);
ASSERT_TRUE(nir_const_value_as_float(imm_vec_instr->value[0], 32) == 1.0);
ASSERT_TRUE(nir_const_value_as_float(imm_vec_instr->value[1], 32) == 3.0);
ASSERT_TRUE(nir_const_value_as_float(imm_vec_instr->value[2], 32) == 4.0);
@ -285,7 +285,7 @@ TEST_F(nir_opt_shrink_vectors_test, opt_shrink_phis_loop_simple)
nir_phi_instr_add_src(phi, v->parent_instr->block, v);
nir_def *fge = nir_fge(b, phi_def, loop_max);
nir_alu_instr *fge_alu_instr = nir_instr_as_alu(fge->parent_instr);
nir_alu_instr *fge_alu_instr = nir_def_as_alu(fge);
fge->num_components = 1;
fge_alu_instr->src[0].swizzle[0] = 1;
@ -297,7 +297,7 @@ TEST_F(nir_opt_shrink_vectors_test, opt_shrink_phis_loop_simple)
nir_pop_if(b, nif);
nir_def *fadd = nir_fadd(b, phi_def, increment);
nir_alu_instr *fadd_alu_instr = nir_instr_as_alu(fadd->parent_instr);
nir_alu_instr *fadd_alu_instr = nir_def_as_alu(fadd);
fadd->num_components = 1;
fadd_alu_instr->src[0].swizzle[0] = 1;
@ -389,7 +389,7 @@ TEST_F(nir_opt_shrink_vectors_test, opt_shrink_phis_loop_swizzle)
nir_phi_instr_add_src(phi, v->parent_instr->block, v);
nir_def *fge = nir_fge(b, phi_def, loop_max);
nir_alu_instr *fge_alu_instr = nir_instr_as_alu(fge->parent_instr);
nir_alu_instr *fge_alu_instr = nir_def_as_alu(fge);
fge->num_components = 1;
fge_alu_instr->src[0].swizzle[0] = 2;
@ -401,7 +401,7 @@ TEST_F(nir_opt_shrink_vectors_test, opt_shrink_phis_loop_swizzle)
nir_pop_if(b, nif);
nir_def *fadd = nir_fadd(b, phi_def, increment);
nir_alu_instr *fadd_alu_instr = nir_instr_as_alu(fadd->parent_instr);
nir_alu_instr *fadd_alu_instr = nir_def_as_alu(fadd);
fadd->num_components = 1;
fadd_alu_instr->src[0].swizzle[0] = 2;
@ -494,7 +494,7 @@ TEST_F(nir_opt_shrink_vectors_test, opt_shrink_phis_loop_phi_out)
nir_phi_instr_add_src(phi, v->parent_instr->block, v);
nir_def *fge = nir_fge(b, phi_def, loop_max);
nir_alu_instr *fge_alu_instr = nir_instr_as_alu(fge->parent_instr);
nir_alu_instr *fge_alu_instr = nir_def_as_alu(fge);
fge->num_components = 1;
fge_alu_instr->src[0].swizzle[0] = 1;
@ -506,7 +506,7 @@ TEST_F(nir_opt_shrink_vectors_test, opt_shrink_phis_loop_phi_out)
nir_pop_if(b, nif);
nir_def *fadd = nir_fadd(b, phi_def, increment);
nir_alu_instr *fadd_alu_instr = nir_instr_as_alu(fadd->parent_instr);
nir_alu_instr *fadd_alu_instr = nir_def_as_alu(fadd);
fadd->num_components = 1;
fadd_alu_instr->src[0].swizzle[0] = 1;

2
src/compiler/nir/tests/range_analysis_tests.cpp
View file

@ -56,7 +56,7 @@ ssa_def_bits_used_test::build_alu_instr(nir_op op,
if (def == NULL)
return NULL;
nir_alu_instr *alu = nir_instr_as_alu(def->parent_instr);
nir_alu_instr *alu = nir_def_as_alu(def);
if (alu == NULL)
return NULL;

8
src/compiler/nir/tests/serialize_tests.cpp
View file

@ -127,7 +127,7 @@ TEST_P(nir_serialize_all_test, alu_single_value_src_swizzle)
nir_def *zero = nir_imm_zero(b, GetParam(), 32);
nir_def *fmax = nir_fmax(b, zero, zero);
nir_alu_instr *fmax_alu = nir_instr_as_alu(fmax->parent_instr);
nir_alu_instr *fmax_alu = nir_def_as_alu(fmax);
memset(fmax_alu->src[0].swizzle, GetParam() - 1, NIR_MAX_VEC_COMPONENTS);
memset(fmax_alu->src[1].swizzle, GetParam() - 1, NIR_MAX_VEC_COMPONENTS);
@ -151,7 +151,7 @@ TEST_P(nir_serialize_all_test, alu_vec)
};
nir_def *vec = nir_vec(b, undefs, GetParam());
nir_alu_instr *vec_alu = nir_instr_as_alu(vec->parent_instr);
nir_alu_instr *vec_alu = nir_def_as_alu(vec);
for (int i = 0; i < GetParam(); i++)
vec_alu->src[i].swizzle[0] = (GetParam() - 1) - i;
@ -166,7 +166,7 @@ TEST_P(nir_serialize_all_test, alu_two_components_full_swizzle)
{
nir_def *undef = nir_undef(b, 2, 32);
nir_def *fma = nir_ffma(b, undef, undef, undef);
nir_alu_instr *fma_alu = nir_instr_as_alu(fma->parent_instr);
nir_alu_instr *fma_alu = nir_def_as_alu(fma);
fma->num_components = GetParam();
@ -187,7 +187,7 @@ TEST_P(nir_serialize_all_but_one_test, single_channel)
{
nir_def *zero = nir_undef(b, GetParam(), 32);
nir_def *vec = nir_channel(b, zero, GetParam() - 1);
nir_alu_instr *vec_alu = nir_instr_as_alu(vec->parent_instr);
nir_alu_instr *vec_alu = nir_def_as_alu(vec);
serialize();

12
src/gallium/drivers/r600/sfn/sfn_nir_lower_64bit.cpp
View file

@ -368,7 +368,7 @@ LowerSplit64BitVar::~LowerSplit64BitVar()
nir_def *
LowerSplit64BitVar::split_double_store_deref(nir_intrinsic_instr *intr)
{
auto deref = nir_instr_as_deref(intr->src[0].ssa->parent_instr);
auto deref = nir_def_as_deref(intr->src[0].ssa);
if (deref->deref_type == nir_deref_type_var)
return split_store_deref_var(intr, deref);
else if (deref->deref_type == nir_deref_type_array)
@ -381,7 +381,7 @@ LowerSplit64BitVar::split_double_store_deref(nir_intrinsic_instr *intr)
nir_def *
LowerSplit64BitVar::split_double_load_deref(nir_intrinsic_instr *intr)
{
auto deref = nir_instr_as_deref(intr->src[0].ssa->parent_instr);
auto deref = nir_def_as_deref(intr->src[0].ssa);
if (deref->deref_type == nir_deref_type_var)
return split_load_deref_var(intr);
else if (deref->deref_type == nir_deref_type_array)
@ -954,7 +954,7 @@ Lower64BitToVec2::lower(nir_instr *instr)
nir_def *
Lower64BitToVec2::load_deref_64_to_vec2(nir_intrinsic_instr *intr)
{
auto deref = nir_instr_as_deref(intr->src[0].ssa->parent_instr);
auto deref = nir_def_as_deref(intr->src[0].ssa);
auto var = nir_intrinsic_get_var(intr, 0);
unsigned components = glsl_get_components(glsl_without_array(var->type));
if (glsl_get_bit_size(glsl_without_array(var->type)) == 64) {
@ -973,7 +973,7 @@ Lower64BitToVec2::load_deref_64_to_vec2(nir_intrinsic_instr *intr)
}
deref->type = var->type;
if (deref->deref_type == nir_deref_type_array) {
auto deref_array = nir_instr_as_deref(deref->parent.ssa->parent_instr);
auto deref_array = nir_def_as_deref(deref->parent.ssa);
deref_array->type = var->type;
deref->type = glsl_without_array(deref_array->type);
}
@ -987,7 +987,7 @@ Lower64BitToVec2::load_deref_64_to_vec2(nir_intrinsic_instr *intr)
nir_def *
Lower64BitToVec2::store_64_to_vec2(nir_intrinsic_instr *intr)
{
auto deref = nir_instr_as_deref(intr->src[0].ssa->parent_instr);
auto deref = nir_def_as_deref(intr->src[0].ssa);
auto var = nir_intrinsic_get_var(intr, 0);
unsigned components = glsl_get_components(glsl_without_array(var->type));
@ -1006,7 +1006,7 @@ Lower64BitToVec2::store_64_to_vec2(nir_intrinsic_instr *intr)
}
deref->type = var->type;
if (deref->deref_type == nir_deref_type_array) {
auto deref_array = nir_instr_as_deref(deref->parent.ssa->parent_instr);
auto deref_array = nir_def_as_deref(deref->parent.ssa);
deref_array->type = var->type;
deref->type = glsl_without_array(deref_array->type);
}

2
src/gallium/drivers/r600/sfn/sfn_nir_lower_alu.cpp
View file

@ -138,7 +138,7 @@ nir_def *FixKcacheIndirectRead::lower(nir_instr *instr)
intr->def.bit_size,
test_bufid,
intr->src[1].ssa);
auto direct_load = nir_instr_as_intrinsic(direct_value->parent_instr);
auto direct_load = nir_def_as_intrinsic(direct_value);
nir_intrinsic_copy_const_indices(direct_load, intr);
result = nir_bcsel(b,
nir_ieq(b, test_bufid, intr->src[0].ssa),

2
src/gallium/drivers/r600/sfn/sfn_shader_fs.cpp
View file

@ -361,7 +361,7 @@ FragmentShader::scan_input(nir_intrinsic_instr *intr, int index_src_id)
if (index_src_id > 0) {
glsl_interp_mode mode = INTERP_MODE_NONE;
auto parent = nir_instr_as_intrinsic(intr->src[0].ssa->parent_instr);
auto parent = nir_def_as_intrinsic(intr->src[0].ssa);
mode = (glsl_interp_mode)nir_intrinsic_interp_mode(parent);
switch (parent->intrinsic) {
case nir_intrinsic_load_barycentric_sample:

12
src/gallium/drivers/r600/sfn/tests/sfn_valuefactory_test.cpp
View file

@ -53,7 +53,7 @@ TEST_F(ValuefactoryTest, test_create_ssa)
auto c1 = nir_imm_float(&b, 2.0);
auto c2 = nir_imm_float(&b, 4.0);
auto sum = nir_fadd(&b, c1, c2);
auto alu = nir_instr_as_alu(sum->parent_instr);
auto alu = nir_def_as_alu(sum);
sfn_log << SfnLog::reg << "Search (test) " << &alu->def << "\n";
auto dest_value = factory->dest(alu->def, 0, pin_none);
@ -74,7 +74,7 @@ TEST_F(ValuefactoryTest, test_create_ssa_pinned_chan)
auto c1 = nir_imm_float(&b, 2.0);
auto c2 = nir_imm_float(&b, 4.0);
auto sum = nir_fadd(&b, c1, c2);
auto alu = nir_instr_as_alu(sum->parent_instr);
auto alu = nir_def_as_alu(sum);
auto dest_value = factory->dest(alu->def, 0, pin_chan);
EXPECT_EQ(dest_value->sel(), 1024);
@ -92,7 +92,7 @@ TEST_F(ValuefactoryTest, test_create_ssa_pinned_chan_and_reg)
auto c1 = nir_imm_float(&b, 2.0);
auto c2 = nir_imm_float(&b, 4.0);
auto sum = nir_fadd(&b, c1, c2);
auto alu = nir_instr_as_alu(sum->parent_instr);
auto alu = nir_def_as_alu(sum);
auto dest_value = factory->dest(alu->def, 1, pin_chan);
EXPECT_EQ(dest_value->sel(), 1024);
@ -111,13 +111,13 @@ TEST_F(ValuefactoryTest, test_create_const)
auto c2 = nir_imm_int(&b, 4);
auto sum = nir_iadd(&b, c1, c2);
auto ci1 = nir_instr_as_load_const(c1->parent_instr);
auto ci1 = nir_def_as_load_const(c1);
factory->allocate_const(ci1);
auto ci2 = nir_instr_as_load_const(c2->parent_instr);
auto ci2 = nir_def_as_load_const(c2);
factory->allocate_const(ci2);
auto alu = nir_instr_as_alu(sum->parent_instr);
auto alu = nir_def_as_alu(sum);
PVirtualValue value1 = factory->src(alu->src[0], 0);
PVirtualValue value2 = factory->src(alu->src[1], 0);

2
src/gallium/drivers/zink/zink_compiler.c
View file

@ -2118,7 +2118,7 @@ rewrite_bo_access_instr(nir_builder *b, nir_instr *instr, void *data)
load[i] = nir_load_ssbo(b, 1, 32, intr->src[0].ssa, nir_iadd_imm(b, intr->src[1].ssa, i), .align_mul = 4, .align_offset = 0);
else
load[i] = nir_load_ubo(b, 1, 32, intr->src[0].ssa, nir_iadd_imm(b, intr->src[1].ssa, i), .align_mul = 4, .align_offset = 0, .range = 4);
nir_intrinsic_set_access(nir_instr_as_intrinsic(load[i]->parent_instr), nir_intrinsic_access(intr));
nir_intrinsic_set_access(nir_def_as_intrinsic(load[i]), nir_intrinsic_access(intr));
}
/* cast back to 64bit */
nir_def *casted = nir_pack_64_2x32_split(b, load[0], load[1]);

3
src/intel/compiler/brw_from_nir.cpp
View file

@ -4559,8 +4559,7 @@ brw_from_nir_emit_fs_intrinsic(nir_to_brw_state &ntb,
case nir_intrinsic_load_interpolated_input: {
assert(instr->src[0].ssa &&
instr->src[0].ssa->parent_instr->type == nir_instr_type_intrinsic);
nir_intrinsic_instr *bary_intrinsic =
nir_instr_as_intrinsic(instr->src[0].ssa->parent_instr);
nir_intrinsic_instr *bary_intrinsic = nir_def_as_intrinsic(instr->src[0].ssa);
nir_intrinsic_op bary_intrin = bary_intrinsic->intrinsic;
brw_reg dst_xy;

2
src/intel/compiler/elk/elk_fs.cpp
View file

@ -6501,7 +6501,7 @@ elk_nir_move_interpolation_to_top(nir_shader *nir)
if (intrin->intrinsic != nir_intrinsic_load_interpolated_input)
continue;
nir_intrinsic_instr *bary_intrinsic =
nir_instr_as_intrinsic(intrin->src[0].ssa->parent_instr);
nir_def_as_intrinsic(intrin->src[0].ssa);
nir_intrinsic_op op = bary_intrinsic->intrinsic;
/* Leave interpolateAtSample/Offset() where they are. */

6
src/intel/compiler/elk/elk_fs_nir.cpp
View file

@ -487,8 +487,7 @@ optimize_extract_to_float(nir_to_elk_state &ntb, nir_alu_instr *instr,
if (instr->src[0].src.ssa->parent_instr->type != nir_instr_type_alu)
return false;
nir_alu_instr *src0 =
nir_instr_as_alu(instr->src[0].src.ssa->parent_instr);
nir_alu_instr *src0 = nir_def_as_alu(instr->src[0].src.ssa);
unsigned bytes;
bool is_signed;
@ -3932,8 +3931,7 @@ fs_nir_emit_fs_intrinsic(nir_to_elk_state &ntb,
case nir_intrinsic_load_interpolated_input: {
assert(instr->src[0].ssa &&
instr->src[0].ssa->parent_instr->type == nir_instr_type_intrinsic);
nir_intrinsic_instr *bary_intrinsic =
nir_instr_as_intrinsic(instr->src[0].ssa->parent_instr);
nir_intrinsic_instr *bary_intrinsic = nir_def_as_intrinsic(instr->src[0].ssa);
nir_intrinsic_op bary_intrin = bary_intrinsic->intrinsic;
elk_fs_reg dst_xy;

3
src/intel/compiler/elk/elk_vec4_nir.cpp
View file

@ -797,8 +797,7 @@ vec4_visitor::optimize_predicate(nir_alu_instr *instr,
if (instr->src[0].src.ssa->parent_instr->type != nir_instr_type_alu)
return false;
nir_alu_instr *cmp_instr =
nir_instr_as_alu(instr->src[0].src.ssa->parent_instr);
nir_alu_instr *cmp_instr = nir_def_as_alu(instr->src[0].src.ssa);
switch (cmp_instr->op) {
case nir_op_b32any_fnequal2:

2
src/nouveau/compiler/nak_nir_lower_image_addrs.c
View file

@ -454,7 +454,7 @@ lower_image_access(nir_builder *b, nir_intrinsic_instr *intrin)
.access = nir_intrinsic_access(intrin),
.flags = offset_mode);
nir_intrinsic_instr *parent = nir_instr_as_intrinsic(new_ssa->parent_instr);
nir_intrinsic_instr *parent = nir_def_as_intrinsic(new_ssa);
new_ssa = lower_formatted_image_load(b, parent, format);
nir_def_rewrite_uses(&intrin->def, new_ssa);