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brw: Make assembler strict about JIP and UIP order

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The "JIP:" and "UIP:" markers were being ignored, so was possible
to switch their order in the text but the parser would act as the
same.  Just fix the order now and enforce it through the parsing.

Since we are here, remove the "Jump:" and "Pop:" that are not used
for Gfx9+ anymore.

Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33522>
This commit is contained in:
Caio Oliveira 2025-02-11 22:37:03 -08:00
parent 25875f5e79
commit 9df254731e
2 changed files with 29 additions and 39 deletions
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59
src/intel/compiler/brw_gram.y
View file

@ -377,6 +377,7 @@ add_label(struct brw_codegen *p, const char* label_name, enum instr_label_type t
/* label */
%token <string> JUMP_LABEL
%token <string> JUMP_LABEL_TARGET
%token JIP UIP
/* opcodes */
%token <integer> ADD ADD3 ADDC AND ASR AVG
@ -542,7 +543,6 @@ add_label(struct brw_codegen *p, const char* label_name, enum instr_label_type t
%type <integer> negate abs chansel math_function sharedfunction
%type <string> jumplabeltarget
%type <string> jumplabel
/* SWSB */
%token <integer> REG_DIST_CURRENT
@ -1098,38 +1098,38 @@ jumpinstruction:
/* branch instruction */
branchinstruction:
predicate ENDIF execsize JUMP_LABEL instoptions
predicate ENDIF execsize JIP JUMP_LABEL instoptions
{
add_label(p, $4, INSTR_LABEL_JIP);
add_label(p, $5, INSTR_LABEL_JIP);
brw_next_insn(p, $2);
i965_asm_set_instruction_options(p, $5);
i965_asm_set_instruction_options(p, $6);
brw_eu_inst_set_exec_size(p->devinfo, brw_last_inst, $3);
brw_set_src0(p, brw_last_inst, brw_imm_d(0x0));
brw_pop_insn_state(p);
}
| ELSE execsize JUMP_LABEL jumplabel instoptions
| ELSE execsize JIP JUMP_LABEL UIP JUMP_LABEL instoptions
{
add_label(p, $3, INSTR_LABEL_JIP);
add_label(p, $4, INSTR_LABEL_UIP);
add_label(p, $4, INSTR_LABEL_JIP);
add_label(p, $6, INSTR_LABEL_UIP);
brw_next_insn(p, $1);
i965_asm_set_instruction_options(p, $5);
i965_asm_set_instruction_options(p, $7);
brw_eu_inst_set_exec_size(p->devinfo, brw_last_inst, $2);
brw_set_dest(p, brw_last_inst, retype(brw_null_reg(), BRW_TYPE_D));
if (p->devinfo->ver < 12)
brw_set_src0(p, brw_last_inst, brw_imm_d(0));
}
| predicate IF execsize JUMP_LABEL jumplabel instoptions
| predicate IF execsize JIP JUMP_LABEL UIP JUMP_LABEL instoptions
{
add_label(p, $4, INSTR_LABEL_JIP);
add_label(p, $5, INSTR_LABEL_UIP);
add_label(p, $5, INSTR_LABEL_JIP);
add_label(p, $7, INSTR_LABEL_UIP);
brw_next_insn(p, $2);
i965_asm_set_instruction_options(p, $6);
i965_asm_set_instruction_options(p, $8);
brw_eu_inst_set_exec_size(p->devinfo, brw_last_inst, $3);
brw_set_dest(p, brw_last_inst, vec1(retype(brw_null_reg(), BRW_TYPE_D)));
@ -1142,13 +1142,13 @@ branchinstruction:
/* break instruction */
breakinstruction:
predicate BREAK execsize JUMP_LABEL JUMP_LABEL instoptions
predicate BREAK execsize JIP JUMP_LABEL UIP JUMP_LABEL instoptions
{
add_label(p, $4, INSTR_LABEL_JIP);
add_label(p, $5, INSTR_LABEL_UIP);
add_label(p, $5, INSTR_LABEL_JIP);
add_label(p, $7, INSTR_LABEL_UIP);
brw_next_insn(p, $2);
i965_asm_set_instruction_options(p, $6);
i965_asm_set_instruction_options(p, $8);
brw_eu_inst_set_exec_size(p->devinfo, brw_last_inst, $3);
brw_set_dest(p, brw_last_inst, retype(brw_null_reg(), BRW_TYPE_D));
@ -1156,13 +1156,13 @@ breakinstruction:
brw_pop_insn_state(p);
}
| predicate HALT execsize JUMP_LABEL JUMP_LABEL instoptions
| predicate HALT execsize JIP JUMP_LABEL UIP JUMP_LABEL instoptions
{
add_label(p, $4, INSTR_LABEL_JIP);
add_label(p, $5, INSTR_LABEL_UIP);
add_label(p, $5, INSTR_LABEL_JIP);
add_label(p, $7, INSTR_LABEL_UIP);
brw_next_insn(p, $2);
i965_asm_set_instruction_options(p, $6);
i965_asm_set_instruction_options(p, $8);
brw_eu_inst_set_exec_size(p->devinfo, brw_last_inst, $3);
brw_set_dest(p, brw_last_inst, retype(brw_null_reg(), BRW_TYPE_D));
@ -1173,13 +1173,13 @@ breakinstruction:
brw_pop_insn_state(p);
}
| predicate CONT execsize JUMP_LABEL JUMP_LABEL instoptions
| predicate CONT execsize JIP JUMP_LABEL UIP JUMP_LABEL instoptions
{
add_label(p, $4, INSTR_LABEL_JIP);
add_label(p, $5, INSTR_LABEL_UIP);
add_label(p, $5, INSTR_LABEL_JIP);
add_label(p, $7, INSTR_LABEL_UIP);
brw_next_insn(p, $2);
i965_asm_set_instruction_options(p, $6);
i965_asm_set_instruction_options(p, $8);
brw_eu_inst_set_exec_size(p->devinfo, brw_last_inst, $3);
brw_set_dest(p, brw_last_inst, brw_ip_reg());
@ -1191,12 +1191,12 @@ breakinstruction:
/* loop instruction */
loopinstruction:
predicate WHILE execsize JUMP_LABEL instoptions
predicate WHILE execsize JIP JUMP_LABEL instoptions
{
add_label(p, $4, INSTR_LABEL_JIP);
add_label(p, $5, INSTR_LABEL_JIP);
brw_next_insn(p, $2);
i965_asm_set_instruction_options(p, $5);
i965_asm_set_instruction_options(p, $6);
brw_eu_inst_set_exec_size(p->devinfo, brw_last_inst, $3);
brw_set_dest(p, brw_last_inst, retype(brw_null_reg(), BRW_TYPE_D));
@ -1264,11 +1264,6 @@ relativelocation2:
| reg32
;
jumplabel:
JUMP_LABEL { $$ = $1; }
| /* empty */ { $$ = NULL; }
;
jumplabeltarget:
JUMP_LABEL_TARGET
{

9
src/intel/compiler/brw_lex.l
View file

@ -365,13 +365,8 @@ sr[0-9]+ { yylval.integer = atoi(yytext + 2); return STATEREG; }
".u" { yylval.integer = BRW_CONDITIONAL_U; return UNORDERED; }
".z" { yylval.integer = BRW_CONDITIONAL_Z; return ZERO; }
/* Eat up JIP and UIP token, their values will be parsed
* in numeric section
*/
"JIP: " { BEGIN(LABEL); }
"UIP: " { BEGIN(LABEL); }
"Jump: " { }
"Pop: " { }
"JIP: " { BEGIN(LABEL); return JIP; }
"UIP: " { BEGIN(LABEL); return UIP; }
[ \t]+ { }
"MsgDesc: " { BEGIN(MSGDESC); return MSGDESC_BEGIN; }