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ac/nir: set support_indirect_inputs/outputs in common code

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This fixes mesh shader performance of RADV for GravityMark by stopping
the lowering of ClipDistance[64][4] indirect access for mesh shader outputs.

The perf improvement is 14% on Navi48.

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38155>
This commit is contained in:
Marek Olšák 2025-10-29 23:39:12 -04:00 • committed by Marge Bot
parent 86dd74aaeb
commit 9def0a6e5b
2 changed files with 4 additions and 3 deletions
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4
src/amd/common/nir/ac_nir.c
View file

@ -96,6 +96,10 @@ void ac_nir_set_options(struct radeon_info *info, bool use_llvm,
nir_lower_minmax64 | nir_lower_iabs64 | nir_lower_iadd_sat64 | nir_lower_conv64 |
nir_lower_bitfield_extract64;
options->divergence_analysis_options = nir_divergence_view_index_uniform;
options->support_indirect_inputs = BITFIELD_BIT(MESA_SHADER_TESS_CTRL) |
BITFIELD_BIT(MESA_SHADER_TESS_EVAL);
options->support_indirect_outputs = BITFIELD_BIT(MESA_SHADER_TESS_CTRL) |
BITFIELD_BIT(MESA_SHADER_MESH);
options->optimize_quad_vote_to_reduce = !use_llvm;
options->lower_fisnormal = true;
options->support_16bit_alu = info->gfx_level >= GFX8;

3
src/gallium/drivers/radeonsi/si_get.c
View file

@ -837,9 +837,6 @@ void si_init_screen_get_functions(struct si_screen *sscreen)
* TCS outputs | Yes
* VS/TES outputs before GS | No
*/
options->support_indirect_inputs = BITFIELD_BIT(MESA_SHADER_TESS_CTRL) |
BITFIELD_BIT(MESA_SHADER_TESS_EVAL);
options->support_indirect_outputs = BITFIELD_BIT(MESA_SHADER_TESS_CTRL);
options->varying_expression_max_cost = si_varying_expression_max_cost;
for (unsigned i = 0; i < MESA_SHADER_STAGES; i++)