From 9de790760e406cf43649c0105e3fab3dee8723a9 Mon Sep 17 00:00:00 2001 From: Caio Oliveira Date: Thu, 25 Aug 2022 17:00:15 -0700 Subject: [PATCH] intel/compiler: Create and use struct for Bindless thread payload MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Reviewed-by: Marcin Ślusarz Acked-by: Ian Romanick Part-of: --- src/intel/compiler/brw_fs.cpp | 3 +-- src/intel/compiler/brw_fs.h | 14 +++++++++++++ src/intel/compiler/brw_fs_nir.cpp | 12 +++++------ src/intel/compiler/brw_fs_thread_payload.cpp | 21 ++++++++++++++++++++ 4 files changed, 41 insertions(+), 9 deletions(-) diff --git a/src/intel/compiler/brw_fs.cpp b/src/intel/compiler/brw_fs.cpp index a4e8cd0beca..b89c077d025 100644 --- a/src/intel/compiler/brw_fs.cpp +++ b/src/intel/compiler/brw_fs.cpp @@ -6837,8 +6837,7 @@ fs_visitor::run_bs(bool allow_spilling) { assert(stage >= MESA_SHADER_RAYGEN && stage <= MESA_SHADER_CALLABLE); - /* R0: thread header, R1: stack IDs, R2: argument addresses */ - payload().num_regs = 3; + payload_ = new bs_thread_payload(); emit_nir_code(); diff --git a/src/intel/compiler/brw_fs.h b/src/intel/compiler/brw_fs.h index 2b74d1f8af7..8b045274256 100644 --- a/src/intel/compiler/brw_fs.h +++ b/src/intel/compiler/brw_fs.h @@ -154,6 +154,15 @@ struct task_mesh_thread_payload : public thread_payload { fs_reg task_urb_input; }; +struct bs_thread_payload : public thread_payload { + bs_thread_payload(); + + fs_reg global_arg_ptr; + fs_reg local_arg_ptr; + + void load_shader_type(const brw::fs_builder &bld, fs_reg &dest) const; +}; + /** * The fragment shader front-end. * @@ -493,6 +502,11 @@ public: return *static_cast(this->payload_); } + bs_thread_payload &bs_payload() { + assert(stage >= MESA_SHADER_RAYGEN && stage <= MESA_SHADER_CALLABLE); + return *static_cast(this->payload_); + } + bool source_depth_to_render_target; bool runtime_check_aads_emit; diff --git a/src/intel/compiler/brw_fs_nir.cpp b/src/intel/compiler/brw_fs_nir.cpp index 29521175faf..9f4eda6ee0d 100644 --- a/src/intel/compiler/brw_fs_nir.cpp +++ b/src/intel/compiler/brw_fs_nir.cpp @@ -3956,6 +3956,7 @@ fs_visitor::nir_emit_bs_intrinsic(const fs_builder &bld, nir_intrinsic_instr *instr) { assert(brw_shader_stage_is_bindless(stage)); + const bs_thread_payload &payload = bs_payload(); fs_reg dest; if (nir_intrinsic_infos[instr->intrinsic].has_dest) @@ -3963,19 +3964,16 @@ fs_visitor::nir_emit_bs_intrinsic(const fs_builder &bld, switch (instr->intrinsic) { case nir_intrinsic_load_btd_global_arg_addr_intel: - bld.MOV(dest, retype(brw_vec1_grf(2, 0), dest.type)); + bld.MOV(dest, retype(payload.global_arg_ptr, dest.type)); break; case nir_intrinsic_load_btd_local_arg_addr_intel: - bld.MOV(dest, retype(brw_vec1_grf(2, 2), dest.type)); + bld.MOV(dest, retype(payload.local_arg_ptr, dest.type)); break; - case nir_intrinsic_load_btd_shader_type_intel: { - fs_reg ud_dest = retype(dest, BRW_REGISTER_TYPE_UD); - bld.MOV(ud_dest, retype(brw_vec1_grf(0, 3), ud_dest.type)); - bld.AND(ud_dest, ud_dest, brw_imm_ud(0xf)); + case nir_intrinsic_load_btd_shader_type_intel: + payload.load_shader_type(bld, dest); break; - } default: nir_emit_intrinsic(bld, instr); diff --git a/src/intel/compiler/brw_fs_thread_payload.cpp b/src/intel/compiler/brw_fs_thread_payload.cpp index 7677b171e95..40fe9753abf 100644 --- a/src/intel/compiler/brw_fs_thread_payload.cpp +++ b/src/intel/compiler/brw_fs_thread_payload.cpp @@ -405,3 +405,24 @@ task_mesh_thread_payload::task_mesh_thread_payload(const fs_visitor &v) num_regs = r; } + +bs_thread_payload::bs_thread_payload() +{ + /* R0: Thread header. */ + + /* R1: Stack IDs. */ + + /* R2: Argument addresses. */ + global_arg_ptr = retype(brw_vec1_grf(2, 0), BRW_REGISTER_TYPE_UD); + local_arg_ptr = retype(brw_vec1_grf(2, 2), BRW_REGISTER_TYPE_UD); + + num_regs = 3; +} + +void +bs_thread_payload::load_shader_type(const fs_builder &bld, fs_reg &dest) const +{ + fs_reg ud_dest = retype(dest, BRW_REGISTER_TYPE_UD); + bld.MOV(ud_dest, retype(brw_vec1_grf(0, 3), ud_dest.type)); + bld.AND(ud_dest, ud_dest, brw_imm_ud(0xf)); +}