diff --git a/src/compiler/spirv/spirv_to_nir.c b/src/compiler/spirv/spirv_to_nir.c index 7d4b9a7d21f..7bab5e0490b 100644 --- a/src/compiler/spirv/spirv_to_nir.c +++ b/src/compiler/spirv/spirv_to_nir.c @@ -5689,9 +5689,9 @@ vtn_handle_execution_mode(struct vtn_builder *b, struct vtn_value *entry_point, break; case SpvExecutionModeSignedZeroInfNanPreserve: switch (mode->operands[0]) { - case 16: execution_mode = FLOAT_CONTROLS_SIGNED_ZERO_INF_NAN_PRESERVE_FP16; break; - case 32: execution_mode = FLOAT_CONTROLS_SIGNED_ZERO_INF_NAN_PRESERVE_FP32; break; - case 64: execution_mode = FLOAT_CONTROLS_SIGNED_ZERO_INF_NAN_PRESERVE_FP64; break; + case 16: b->fp_math_ctrl_fp16 |= nir_fp_preserve_sz_inf_nan; break; + case 32: b->fp_math_ctrl_fp32 |= nir_fp_preserve_sz_inf_nan; break; + case 64: b->fp_math_ctrl_fp64 |= nir_fp_preserve_sz_inf_nan; break; default: vtn_fail("Floating point type not supported"); } break; @@ -5863,29 +5863,27 @@ vtn_handle_execution_mode_id(struct vtn_builder *b, struct vtn_value *entry_poin if ((flags & can_fast_math) != can_fast_math) b->exact = true; - unsigned execution_mode = 0; if (!(flags & SpvFPFastMathModeNotNaNMask)) { switch (glsl_get_bit_size(type->type)) { - case 16: execution_mode |= FLOAT_CONTROLS_NAN_PRESERVE_FP16; break; - case 32: execution_mode |= FLOAT_CONTROLS_NAN_PRESERVE_FP32; break; - case 64: execution_mode |= FLOAT_CONTROLS_NAN_PRESERVE_FP64; break; + case 16: b->fp_math_ctrl_fp16 |= nir_fp_preserve_nan; break; + case 32: b->fp_math_ctrl_fp32 |= nir_fp_preserve_nan; break; + case 64: b->fp_math_ctrl_fp64 |= nir_fp_preserve_nan; break; } } if (!(flags & SpvFPFastMathModeNotInfMask)) { switch (glsl_get_bit_size(type->type)) { - case 16: execution_mode |= FLOAT_CONTROLS_INF_PRESERVE_FP16; break; - case 32: execution_mode |= FLOAT_CONTROLS_INF_PRESERVE_FP32; break; - case 64: execution_mode |= FLOAT_CONTROLS_INF_PRESERVE_FP64; break; + case 16: b->fp_math_ctrl_fp16 |= nir_fp_preserve_inf; break; + case 32: b->fp_math_ctrl_fp32 |= nir_fp_preserve_inf; break; + case 64: b->fp_math_ctrl_fp64 |= nir_fp_preserve_inf; break; } } if (!(flags & SpvFPFastMathModeNSZMask)) { switch (glsl_get_bit_size(type->type)) { - case 16: execution_mode |= FLOAT_CONTROLS_SIGNED_ZERO_PRESERVE_FP16; break; - case 32: execution_mode |= FLOAT_CONTROLS_SIGNED_ZERO_PRESERVE_FP32; break; - case 64: execution_mode |= FLOAT_CONTROLS_SIGNED_ZERO_PRESERVE_FP64; break; + case 16: b->fp_math_ctrl_fp16 |= nir_fp_preserve_signed_zero; break; + case 32: b->fp_math_ctrl_fp32 |= nir_fp_preserve_signed_zero; break; + case 64: b->fp_math_ctrl_fp64 |= nir_fp_preserve_signed_zero; break; } } - b->shader->info.float_controls_execution_mode |= execution_mode; break; } diff --git a/src/compiler/spirv/vtn_alu.c b/src/compiler/spirv/vtn_alu.c index 9c12afde8cb..b3da3851b76 100644 --- a/src/compiler/spirv/vtn_alu.c +++ b/src/compiler/spirv/vtn_alu.c @@ -433,26 +433,22 @@ vtn_handle_fp_fast_math(struct vtn_builder *b, struct vtn_value *val) * on the builder, so the generated instructions can take it from it. * We only care about some of them, check nir_alu_instr for details. */ + unsigned bit_size; - b->nb.fp_math_ctrl = 0; - unsigned exec_mode = b->shader->info.float_controls_execution_mode; - if (val->type) { - unsigned bit_size; + /* Some ALU like modf and frexp return a struct of two values. */ + if (!val->type) + bit_size = 0; + else if (glsl_type_is_struct(val->type->type)) + bit_size = glsl_get_bit_size(val->type->type->fields.structure[0].type); + else + bit_size = glsl_get_bit_size(val->type->type); - /* Some ALU like modf and frexp return a struct of two values. */ - if (glsl_type_is_struct(val->type->type)) - bit_size = glsl_get_bit_size(val->type->type->fields.structure[0].type); - else - bit_size = glsl_get_bit_size(val->type->type); - if (bit_size >= 16 && bit_size <= 64) { - if (nir_is_float_control_signed_zero_preserve(exec_mode, bit_size)) - b->nb.fp_math_ctrl |= nir_fp_preserve_signed_zero; - if (nir_is_float_control_inf_preserve(exec_mode, bit_size)) - b->nb.fp_math_ctrl |= nir_fp_preserve_inf; - if (nir_is_float_control_nan_preserve(exec_mode, bit_size)) - b->nb.fp_math_ctrl |= nir_fp_preserve_nan; - } + switch (bit_size) { + case 16: b->nb.fp_math_ctrl = b->fp_math_ctrl_fp16; break; + case 32: b->nb.fp_math_ctrl = b->fp_math_ctrl_fp32; break; + case 64: b->nb.fp_math_ctrl = b->fp_math_ctrl_fp64; break; + default: b->nb.fp_math_ctrl = 0; break; } vtn_foreach_decoration(b, val, handle_fp_fast_math, NULL); diff --git a/src/compiler/spirv/vtn_private.h b/src/compiler/spirv/vtn_private.h index 5d601f95c86..4b028b57290 100644 --- a/src/compiler/spirv/vtn_private.h +++ b/src/compiler/spirv/vtn_private.h @@ -709,6 +709,10 @@ struct vtn_builder { /* false by default, set to true by the ContractionOff execution mode */ bool exact; + unsigned fp_math_ctrl_fp16; + unsigned fp_math_ctrl_fp32; + unsigned fp_math_ctrl_fp64; + /* when a physical memory model is choosen */ bool physical_ptrs;