From 9d8288838394d3d58c7f79e59fbb61cec5232c3e Mon Sep 17 00:00:00 2001
From: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Date: Fri, 9 Jan 2026 15:53:05 -0500
Subject: [PATCH] brw: lower 16-bit mulh

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40877>
---
 src/intel/compiler/brw/brw_nir.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/src/intel/compiler/brw/brw_nir.c b/src/intel/compiler/brw/brw_nir.c
index 767e833a788..dff440e8b2f 100644
--- a/src/intel/compiler/brw/brw_nir.c
+++ b/src/intel/compiler/brw/brw_nir.c
@@ -1721,6 +1721,9 @@ lower_bit_size_callback(const nir_instr *instr, void *data)
       switch (alu->op) {
       case nir_op_bitfield_reverse:
          return alu->def.bit_size != 32 ? 32 : 0;
+      case nir_op_umul_high:
+      case nir_op_imul_high:
+         return alu->def.bit_size < 32 ? 32 : 0;
       case nir_op_idiv:
       case nir_op_imod:
       case nir_op_irem: