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i965: Use ull immediates in brw_inst_bits

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This fixes a regression introduced in b1a83b5d1 that caused basically all
shaders to fail to compile on 32-bit platforms.

Reported-by: Mark Janes <mark.a.janes@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
This commit is contained in:
Jason Ekstrand 2015-11-23 10:53:01 -08:00
parent e4c1221d36
commit 9d703de85a
1 changed files with 2 additions and 2 deletions
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4
src/mesa/drivers/dri/i965/brw_inst.h
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@ -694,7 +694,7 @@ brw_inst_bits(const brw_inst *inst, unsigned high, unsigned low)
high %= 64;
low %= 64;
const uint64_t mask = (~0ul >> (64 - (high - low + 1)));
const uint64_t mask = (~0ull >> (64 - (high - low + 1)));
return (inst->data[word] >> low) & mask;
}
@ -713,7 +713,7 @@ brw_inst_set_bits(brw_inst *inst, unsigned high, unsigned low, uint64_t value)
high %= 64;
low %= 64;
const uint64_t mask = (~0ul >> (64 - (high - low + 1))) << low;
const uint64_t mask = (~0ull >> (64 - (high - low + 1))) << low;
/* Make sure the supplied value actually fits in the given bitfield. */
assert((value & (mask >> low)) == value);