diff --git a/src/nouveau/compiler/nak/builder.rs b/src/nouveau/compiler/nak/builder.rs
index abedf4b64bd..8e116d2c741 100644
--- a/src/nouveau/compiler/nak/builder.rs
+++ b/src/nouveau/compiler/nak/builder.rs
@@ -203,6 +203,40 @@ pub trait SSABuilder: Builder {
         dst
     }
 
+    fn iadd64(&mut self, x: Src, y: Src) -> SSARef {
+        let x = x.as_ssa().unwrap();
+        let y = y.as_ssa().unwrap();
+        let dst = self.alloc_ssa(RegFile::GPR, 2);
+        if self.sm() >= 70 {
+            let carry = self.alloc_ssa(RegFile::Pred, 1);
+            self.push_op(OpIAdd3 {
+                dst: dst[0].into(),
+                overflow: [carry.into(), Dst::None],
+                srcs: [x[0].into(), y[0].into(), 0.into()],
+            });
+            self.push_op(OpIAdd3X {
+                dst: dst[1].into(),
+                overflow: [Dst::None, Dst::None],
+                srcs: [x[1].into(), y[1].into(), 0.into()],
+                carry: [carry.into(), false.into()],
+            });
+        } else {
+            self.push_op(OpIAdd2 {
+                dst: dst[0].into(),
+                srcs: [x[0].into(), y[0].into()],
+                carry_out: true,
+                carry_in: false,
+            });
+            self.push_op(OpIAdd2 {
+                dst: dst[1].into(),
+                srcs: [x[1].into(), y[1].into()],
+                carry_out: false,
+                carry_in: true,
+            });
+        }
+        dst
+    }
+
     fn imnmx(&mut self, tp: IntCmpType, x: Src, y: Src, min: Src) -> SSARef {
         let dst = self.alloc_ssa(RegFile::GPR, 1);
         self.push_op(OpIMnMx {
diff --git a/src/nouveau/compiler/nak/from_nir.rs b/src/nouveau/compiler/nak/from_nir.rs
index b74618c83c6..baad78bb07c 100644
--- a/src/nouveau/compiler/nak/from_nir.rs
+++ b/src/nouveau/compiler/nak/from_nir.rs
@@ -751,44 +751,11 @@ impl<'a> ShaderFromNir<'a> {
                 }
             }
             nir_op_iabs => b.iabs(srcs[0]),
-            nir_op_iadd => {
-                if alu.def.bit_size == 64 {
-                    let x = srcs[0].as_ssa().unwrap();
-                    let y = srcs[1].as_ssa().unwrap();
-                    let sum = b.alloc_ssa(RegFile::GPR, 2);
-                    let carry = b.alloc_ssa(RegFile::Pred, 1);
-                    if self.info.sm >= 70 {
-                        b.push_op(OpIAdd3 {
-                            dst: sum[0].into(),
-                            overflow: [carry.into(), Dst::None],
-                            srcs: [x[0].into(), y[0].into(), 0.into()],
-                        });
-                        b.push_op(OpIAdd3X {
-                            dst: sum[1].into(),
-                            overflow: [Dst::None, Dst::None],
-                            srcs: [x[1].into(), y[1].into(), 0.into()],
-                            carry: [carry.into(), SrcRef::False.into()],
-                        });
-                    } else {
-                        b.push_op(OpIAdd2 {
-                            dst: sum[0].into(),
-                            srcs: [x[0].into(), y[0].into()],
-                            carry_out: true,
-                            carry_in: false,
-                        });
-                        b.push_op(OpIAdd2 {
-                            dst: sum[1].into(),
-                            srcs: [x[1].into(), y[1].into()],
-                            carry_out: false,
-                            carry_in: true,
-                        });
-                    }
-                    sum
-                } else {
-                    assert!(alu.def.bit_size() == 32);
-                    b.iadd(srcs[0], srcs[1])
-                }
-            }
+            nir_op_iadd => match alu.def.bit_size {
+                32 => b.iadd(srcs[0], srcs[1]),
+                64 => b.iadd64(srcs[0], srcs[1]),
+                x => panic!("unsupported bit size for nir_op_iadd: {x}"),
+            },
             nir_op_iand => b.lop2(LogicOp2::And, srcs[0], srcs[1]),
             nir_op_ieq => {
                 if alu.get_src(0).bit_size() == 1 {