mirror of
https://gitlab.freedesktop.org/mesa/mesa.git
synced 2026-01-08 21:30:23 +01:00
intel/kernel: Use the new capabilities struct
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io> Reviewed-by: Iván Briano <ivan.briano@intel.com> Acked-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28905>
This commit is contained in:
parent
ac500495ac
commit
9d5b4a4ffd
2 changed files with 59 additions and 77 deletions
|
|
@ -30,6 +30,7 @@
|
|||
#include "nir_clc_helpers.h"
|
||||
#include "compiler/nir/nir_builder.h"
|
||||
#include "compiler/spirv/nir_spirv.h"
|
||||
#include "compiler/spirv/spirv_info.h"
|
||||
#include "dev/intel_debug.h"
|
||||
#include "util/u_atomic.h"
|
||||
#include "util/u_dynarray.h"
|
||||
|
|
@ -240,6 +241,37 @@ lower_kernel_intrinsics(nir_shader *nir)
|
|||
return progress;
|
||||
}
|
||||
|
||||
static const struct spirv_capabilities spirv_caps = {
|
||||
.Addresses = true,
|
||||
.Float16 = true,
|
||||
.Float64 = true,
|
||||
.Groups = true,
|
||||
.StorageImageWriteWithoutFormat = true,
|
||||
.Int8 = true,
|
||||
.Int16 = true,
|
||||
.Int64 = true,
|
||||
.Int64Atomics = true,
|
||||
.Kernel = true,
|
||||
.Linkage = true, /* We receive linked kernel from clc */
|
||||
.DenormFlushToZero = true,
|
||||
.DenormPreserve = true,
|
||||
.SignedZeroInfNanPreserve = true,
|
||||
.RoundingModeRTE = true,
|
||||
.RoundingModeRTZ = true,
|
||||
.GenericPointer = true,
|
||||
.GroupNonUniform = true,
|
||||
.GroupNonUniformArithmetic = true,
|
||||
.GroupNonUniformClustered = true,
|
||||
.GroupNonUniformBallot = true,
|
||||
.GroupNonUniformQuad = true,
|
||||
.GroupNonUniformShuffle = true,
|
||||
.GroupNonUniformVote = true,
|
||||
.SubgroupDispatch = true,
|
||||
|
||||
.SubgroupShuffleINTEL = true,
|
||||
.SubgroupBufferBlockIOINTEL = true,
|
||||
};
|
||||
|
||||
bool
|
||||
brw_kernel_from_spirv(struct brw_compiler *compiler,
|
||||
struct disk_cache *disk_cache,
|
||||
|
|
@ -255,33 +287,7 @@ brw_kernel_from_spirv(struct brw_compiler *compiler,
|
|||
|
||||
struct spirv_to_nir_options spirv_options = {
|
||||
.environment = NIR_SPIRV_OPENCL,
|
||||
.caps = {
|
||||
.address = true,
|
||||
.float16 = true,
|
||||
.float64 = true,
|
||||
.groups = true,
|
||||
.image_write_without_format = true,
|
||||
.int8 = true,
|
||||
.int16 = true,
|
||||
.int64 = true,
|
||||
.int64_atomics = true,
|
||||
.kernel = true,
|
||||
.linkage = true, /* We receive linked kernel from clc */
|
||||
.float_controls = true,
|
||||
.generic_pointers = true,
|
||||
.storage_8bit = true,
|
||||
.storage_16bit = true,
|
||||
.subgroup_arithmetic = true,
|
||||
.subgroup_basic = true,
|
||||
.subgroup_ballot = true,
|
||||
.subgroup_dispatch = true,
|
||||
.subgroup_quad = true,
|
||||
.subgroup_shuffle = true,
|
||||
.subgroup_vote = true,
|
||||
|
||||
.intel_subgroup_shuffle = true,
|
||||
.intel_subgroup_buffer_block_io = true,
|
||||
},
|
||||
.capabilities = &spirv_caps,
|
||||
.shared_addr_format = nir_address_format_62bit_generic,
|
||||
.global_addr_format = nir_address_format_62bit_generic,
|
||||
.temp_addr_format = nir_address_format_62bit_generic,
|
||||
|
|
@ -593,31 +599,7 @@ brw_nir_from_spirv(void *mem_ctx, unsigned gfx_version, const uint32_t *spirv,
|
|||
{
|
||||
struct spirv_to_nir_options spirv_options = {
|
||||
.environment = NIR_SPIRV_OPENCL,
|
||||
.caps = {
|
||||
.address = true,
|
||||
.groups = true,
|
||||
.image_write_without_format = true,
|
||||
.int8 = true,
|
||||
.int16 = true,
|
||||
.int64 = true,
|
||||
.int64_atomics = true,
|
||||
.kernel = true,
|
||||
.linkage = true, /* We receive linked kernel from clc */
|
||||
.float_controls = true,
|
||||
.generic_pointers = true,
|
||||
.storage_8bit = true,
|
||||
.storage_16bit = true,
|
||||
.subgroup_arithmetic = true,
|
||||
.subgroup_basic = true,
|
||||
.subgroup_ballot = true,
|
||||
.subgroup_dispatch = true,
|
||||
.subgroup_quad = true,
|
||||
.subgroup_shuffle = true,
|
||||
.subgroup_vote = true,
|
||||
|
||||
.intel_subgroup_shuffle = true,
|
||||
.intel_subgroup_buffer_block_io = true,
|
||||
},
|
||||
.capabilities = &spirv_caps,
|
||||
.shared_addr_format = nir_address_format_62bit_generic,
|
||||
.global_addr_format = nir_address_format_62bit_generic,
|
||||
.temp_addr_format = nir_address_format_62bit_generic,
|
||||
|
|
|
|||
|
|
@ -27,6 +27,7 @@
|
|||
#include "compiler/clc/clc.h"
|
||||
#include "compiler/glsl_types.h"
|
||||
#include "compiler/nir/nir_serialize.h"
|
||||
#include "compiler/spirv/spirv_info.h"
|
||||
#include "dev/intel_debug.h"
|
||||
#include "util/build_id.h"
|
||||
#include "util/disk_cache.h"
|
||||
|
|
@ -318,33 +319,32 @@ struct intel_clc_params {
|
|||
static int
|
||||
output_nir(const struct intel_clc_params *params, struct clc_binary *binary)
|
||||
{
|
||||
const struct spirv_capabilities spirv_caps = {
|
||||
.Addresses = true,
|
||||
.Groups = true,
|
||||
.StorageImageWriteWithoutFormat = true,
|
||||
.Int8 = true,
|
||||
.Int16 = true,
|
||||
.Int64 = true,
|
||||
.Int64Atomics = true,
|
||||
.Kernel = true,
|
||||
.Linkage = true, /* We receive linked kernel from clc */
|
||||
.GenericPointer = true,
|
||||
.GroupNonUniform = true,
|
||||
.GroupNonUniformArithmetic = true,
|
||||
.GroupNonUniformBallot = true,
|
||||
.GroupNonUniformQuad = true,
|
||||
.GroupNonUniformShuffle = true,
|
||||
.GroupNonUniformVote = true,
|
||||
.SubgroupDispatch = true,
|
||||
|
||||
.SubgroupShuffleINTEL = true,
|
||||
.SubgroupBufferBlockIOINTEL = true,
|
||||
};
|
||||
|
||||
struct spirv_to_nir_options spirv_options = {
|
||||
.environment = NIR_SPIRV_OPENCL,
|
||||
.caps = {
|
||||
.address = true,
|
||||
.groups = true,
|
||||
.image_write_without_format = true,
|
||||
.int8 = true,
|
||||
.int16 = true,
|
||||
.int64 = true,
|
||||
.int64_atomics = true,
|
||||
.kernel = true,
|
||||
.linkage = true, /* We receive linked kernel from clc */
|
||||
.float_controls = true,
|
||||
.generic_pointers = true,
|
||||
.storage_8bit = true,
|
||||
.storage_16bit = true,
|
||||
.subgroup_arithmetic = true,
|
||||
.subgroup_basic = true,
|
||||
.subgroup_ballot = true,
|
||||
.subgroup_dispatch = true,
|
||||
.subgroup_quad = true,
|
||||
.subgroup_shuffle = true,
|
||||
.subgroup_vote = true,
|
||||
|
||||
.intel_subgroup_shuffle = true,
|
||||
.intel_subgroup_buffer_block_io = true,
|
||||
},
|
||||
.capabilities = &spirv_caps,
|
||||
.shared_addr_format = nir_address_format_62bit_generic,
|
||||
.global_addr_format = nir_address_format_62bit_generic,
|
||||
.temp_addr_format = nir_address_format_62bit_generic,
|
||||
|
|
|
|||
Loading…
Add table
Reference in a new issue