gallium: add PIPE_CAP_MAX_TEXTURE_UPLOAD_MEMORY_BUDGET

This commit is contained in:
Marek Olšák 2018-08-31 20:52:29 -04:00
parent ecfe41e690
commit 9ce2cef68f
16 changed files with 24 additions and 0 deletions

View file

@ -320,6 +320,7 @@ u_pipe_screen_get_param_defaults(struct pipe_screen *pscreen,
return 1 << 27;
case PIPE_CAP_TEXTURE_MIRROR_CLAMP_TO_EDGE:
case PIPE_CAP_MAX_TEXTURE_UPLOAD_MEMORY_BUDGET:
return 0;
default:

View file

@ -472,6 +472,9 @@ subpixel precision bias in bits during conservative rasterization.
* ``PIPE_CAP_MAX_COMBINED_HW_ATOMIC_COUNTER_BUFFERS``: Maximum total number of
atomic counter buffers. A value of 0 means the sum of all per-shader stage
maximums (see ``PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTER_BUFFERS``).
* ``PIPE_CAP_MAX_TEXTURE_UPLOAD_MEMORY_BUDGET: Maximum recommend memory size
for all active texture uploads combined. This is a performance hint.
0 means no limit.
.. _pipe_capf:

View file

@ -286,6 +286,7 @@ etna_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
case PIPE_CAP_MAX_CONSERVATIVE_RASTER_SUBPIXEL_PRECISION_BIAS:
case PIPE_CAP_PACKED_UNIFORMS:
case PIPE_CAP_PROGRAMMABLE_SAMPLE_LOCATIONS:
case PIPE_CAP_MAX_TEXTURE_UPLOAD_MEMORY_BUDGET:
return 0;
case PIPE_CAP_MAX_GS_INVOCATIONS:

View file

@ -292,6 +292,7 @@ i915_get_param(struct pipe_screen *screen, enum pipe_cap cap)
case PIPE_CAP_CONSERVATIVE_RASTER_PRE_SNAP_POINTS_LINES:
case PIPE_CAP_CONSERVATIVE_RASTER_POST_DEPTH_COVERAGE:
case PIPE_CAP_MAX_CONSERVATIVE_RASTER_SUBPIXEL_PRECISION_BIAS:
case PIPE_CAP_MAX_TEXTURE_UPLOAD_MEMORY_BUDGET:
return 0;
case PIPE_CAP_MAX_DUAL_SOURCE_RENDER_TARGETS:

View file

@ -138,6 +138,7 @@ llvmpipe_get_param(struct pipe_screen *screen, enum pipe_cap param)
case PIPE_CAP_TEXTURE_SWIZZLE:
return 1;
case PIPE_CAP_TEXTURE_BORDER_COLOR_QUIRK:
case PIPE_CAP_MAX_TEXTURE_UPLOAD_MEMORY_BUDGET:
return 0;
case PIPE_CAP_MAX_TEXTURE_2D_LEVELS:
return LP_MAX_TEXTURE_2D_LEVELS;

View file

@ -241,6 +241,7 @@ nv30_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
case PIPE_CAP_CONSERVATIVE_RASTER_POST_DEPTH_COVERAGE:
case PIPE_CAP_MAX_CONSERVATIVE_RASTER_SUBPIXEL_PRECISION_BIAS:
case PIPE_CAP_PROGRAMMABLE_SAMPLE_LOCATIONS:
case PIPE_CAP_MAX_TEXTURE_UPLOAD_MEMORY_BUDGET:
return 0;
case PIPE_CAP_MAX_GS_INVOCATIONS:

View file

@ -295,6 +295,7 @@ nv50_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
case PIPE_CAP_CONSERVATIVE_RASTER_POST_DEPTH_COVERAGE:
case PIPE_CAP_MAX_CONSERVATIVE_RASTER_SUBPIXEL_PRECISION_BIAS:
case PIPE_CAP_PROGRAMMABLE_SAMPLE_LOCATIONS:
case PIPE_CAP_MAX_TEXTURE_UPLOAD_MEMORY_BUDGET:
return 0;
case PIPE_CAP_MAX_GS_INVOCATIONS:

View file

@ -322,6 +322,7 @@ nvc0_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
case PIPE_CAP_CONSTBUF0_FLAGS:
case PIPE_CAP_PACKED_UNIFORMS:
case PIPE_CAP_CONSERVATIVE_RASTER_PRE_SNAP_POINTS_LINES:
case PIPE_CAP_MAX_TEXTURE_UPLOAD_MEMORY_BUDGET:
return 0;
case PIPE_CAP_VENDOR_ID:

View file

@ -263,6 +263,7 @@ static int r300_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
case PIPE_CAP_CONSERVATIVE_RASTER_POST_DEPTH_COVERAGE:
case PIPE_CAP_MAX_CONSERVATIVE_RASTER_SUBPIXEL_PRECISION_BIAS:
case PIPE_CAP_PROGRAMMABLE_SAMPLE_LOCATIONS:
case PIPE_CAP_MAX_TEXTURE_UPLOAD_MEMORY_BUDGET:
return 0;
case PIPE_CAP_MAX_GS_INVOCATIONS:

View file

@ -311,6 +311,10 @@ static int r600_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
case PIPE_CAP_ROBUST_BUFFER_ACCESS_BEHAVIOR:
return 1;
case PIPE_CAP_MAX_TEXTURE_UPLOAD_MEMORY_BUDGET:
/* Optimal number for good TexSubImage performance on Polaris10. */
return 64 * 1024 * 1024;
case PIPE_CAP_DEVICE_RESET_STATUS_QUERY:
return rscreen->b.info.drm_major == 2 && rscreen->b.info.drm_minor >= 43;

View file

@ -190,6 +190,10 @@ static int si_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
return 450;
return 420;
case PIPE_CAP_MAX_TEXTURE_UPLOAD_MEMORY_BUDGET:
/* Optimal number for good TexSubImage performance on Polaris10. */
return 64 * 1024 * 1024;
case PIPE_CAP_MAX_TEXTURE_BUFFER_SIZE:
case PIPE_CAP_MAX_SHADER_BUFFER_SIZE:
return MIN2(sscreen->info.max_alloc_size, INT_MAX);

View file

@ -92,6 +92,7 @@ softpipe_get_param(struct pipe_screen *screen, enum pipe_cap param)
case PIPE_CAP_TEXTURE_SWIZZLE:
return 1;
case PIPE_CAP_TEXTURE_BORDER_COLOR_QUIRK:
case PIPE_CAP_MAX_TEXTURE_UPLOAD_MEMORY_BUDGET:
return 0;
case PIPE_CAP_MAX_TEXTURE_2D_LEVELS:
return SP_MAX_TEXTURE_2D_LEVELS;

View file

@ -392,6 +392,7 @@ svga_get_param(struct pipe_screen *screen, enum pipe_cap param)
case PIPE_CAP_CONSERVATIVE_RASTER_PRE_SNAP_POINTS_LINES:
case PIPE_CAP_CONSERVATIVE_RASTER_POST_DEPTH_COVERAGE:
case PIPE_CAP_MAX_CONSERVATIVE_RASTER_SUBPIXEL_PRECISION_BIAS:
case PIPE_CAP_MAX_TEXTURE_UPLOAD_MEMORY_BUDGET:
return 0;
case PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT:
return 64;

View file

@ -363,6 +363,7 @@ swr_get_param(struct pipe_screen *screen, enum pipe_cap param)
case PIPE_CAP_CONSERVATIVE_RASTER_POST_DEPTH_COVERAGE:
case PIPE_CAP_MAX_CONSERVATIVE_RASTER_SUBPIXEL_PRECISION_BIAS:
case PIPE_CAP_PROGRAMMABLE_SAMPLE_LOCATIONS:
case PIPE_CAP_MAX_TEXTURE_UPLOAD_MEMORY_BUDGET:
return 0;
case PIPE_CAP_MAX_GS_INVOCATIONS:
return 32;

View file

@ -324,6 +324,7 @@ virgl_get_param(struct pipe_screen *screen, enum pipe_cap param)
case PIPE_CAP_CONSERVATIVE_RASTER_POST_DEPTH_COVERAGE:
case PIPE_CAP_MAX_CONSERVATIVE_RASTER_SUBPIXEL_PRECISION_BIAS:
case PIPE_CAP_PROGRAMMABLE_SAMPLE_LOCATIONS:
case PIPE_CAP_MAX_TEXTURE_UPLOAD_MEMORY_BUDGET:
return 0;
case PIPE_CAP_MAX_GS_INVOCATIONS:
return 32;

View file

@ -823,6 +823,7 @@ enum pipe_cap
PIPE_CAP_MAX_COMBINED_SHADER_BUFFERS,
PIPE_CAP_MAX_COMBINED_HW_ATOMIC_COUNTERS,
PIPE_CAP_MAX_COMBINED_HW_ATOMIC_COUNTER_BUFFERS,
PIPE_CAP_MAX_TEXTURE_UPLOAD_MEMORY_BUDGET,
};
/**