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iris: Add more restrictions on compression (Xe2)

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Also move the declaration of a local variable to where
it is going to use.

Signed-off-by: Jianxun Zhang <jianxun.zhang@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29906>
This commit is contained in:
Jianxun Zhang 2024-04-16 20:24:15 -07:00 • committed by Marge Bot
parent 0b75f89f57
commit 9cd97b6137
1 changed files with 38 additions and 4 deletions
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42
src/gallium/drivers/iris/iris_resource.c
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@ -1013,7 +1013,7 @@ iris_resource_image_is_pat_compressible(const struct iris_screen *screen,
struct iris_resource *res,
unsigned flags)
{
struct iris_bufmgr *bufmgr = screen->bufmgr;
assert(templ->target != PIPE_BUFFER);
if (INTEL_DEBUG(DEBUG_NO_CCS))
return false;
@ -1021,14 +1021,48 @@ iris_resource_image_is_pat_compressible(const struct iris_screen *screen,
if (screen->devinfo->ver < 20)
return false;
if ((flags & BO_ALLOC_PROTECTED) || (flags & BO_ALLOC_COHERENT))
if (flags & (BO_ALLOC_PROTECTED |
BO_ALLOC_COHERENT |
BO_ALLOC_CPU_VISIBLE))
return false;
struct iris_bufmgr *bufmgr = screen->bufmgr;
if ((iris_bufmgr_vram_size(bufmgr) > 0) && (flags & BO_ALLOC_SMEM))
return false;
/* TODO: check for other compression requirements and return true */
return false;
/* We don't have modifiers with compression enabled on Xe2 so far. */
if (res->mod_info) {
assert(!isl_drm_modifier_has_aux(res->mod_info->modifier));
return false;
}
/* Bspec 58797 (r58646):
*
* Enabling compression is not legal for TileX surfaces.
*/
if (res->surf.tiling == ISL_TILING_X)
return false;
/* Bspec 71650 (r59764):
*
* 3 SW must disable or resolve compression
* Display: Access to anything except Tile4 Framebuffers...
* Display Page Tables
* Display State Buffers
* Linear/TileX Framebuffers
* Display Write-Back Buffers
* Etc.
*
* So far, we don't support resolving on Xe2 and may not want to enable
* compression under these conditions later, so we only enable it when
* a TILING_4 image is to display.
*/
if ((flags & BO_ALLOC_SCANOUT) && res->surf.tiling != ISL_TILING_4) {
assert(res->surf.tiling == ISL_TILING_LINEAR);
return false;
}
return true;
}
static struct pipe_resource *