diff --git a/src/gallium/drivers/zink/ci/zink-anv-tgl-flakes.txt b/src/gallium/drivers/zink/ci/zink-anv-tgl-flakes.txt
index e9b9b1c15e3..78639ebb53c 100644
--- a/src/gallium/drivers/zink/ci/zink-anv-tgl-flakes.txt
+++ b/src/gallium/drivers/zink/ci/zink-anv-tgl-flakes.txt
@@ -1,6 +1,3 @@
-# driver seems flaky
-KHR-GL46.sample_variables.mask.rgba8.*.samples.*.mask.*
-
 # ???
 spec@arb_query_buffer_object@qbo
 spec@arb_query_buffer_object@qbo@query-GL_PRIMITIVES_SUBMITTED-ASYNC_CPU_READ_BEFORE-GL_UNSIGNED_INT64_ARB
diff --git a/src/intel/compiler/brw_nir_lower_alpha_to_coverage.c b/src/intel/compiler/brw_nir_lower_alpha_to_coverage.c
index 250d47aeb73..eb13698b536 100644
--- a/src/intel/compiler/brw_nir_lower_alpha_to_coverage.c
+++ b/src/intel/compiler/brw_nir_lower_alpha_to_coverage.c
@@ -175,9 +175,7 @@ brw_nir_lower_alpha_to_coverage(nir_shader *shader,
       nir_def *push_flags =
          nir_load_uniform(&b, 1, 32, nir_imm_int(&b, prog_data->msaa_flags_param * 4));
       nir_def *alpha_to_coverage =
-         nir_i2b(&b,
-                 nir_iadd_imm(&b, push_flags,
-                              BRW_WM_MSAA_FLAG_ALPHA_TO_COVERAGE));
+         nir_test_mask(&b, push_flags, BRW_WM_MSAA_FLAG_ALPHA_TO_COVERAGE);
       dither_mask = nir_bcsel(&b, alpha_to_coverage,
                               dither_mask, sample_mask_write->src[0].ssa);
    }