diff --git a/src/compiler/nir/nir_lower_alu_width.c b/src/compiler/nir/nir_lower_alu_width.c
index b73e4f2bdb2..cf1e6dfdefc 100644
--- a/src/compiler/nir/nir_lower_alu_width.c
+++ b/src/compiler/nir/nir_lower_alu_width.c
@@ -455,16 +455,12 @@ nir_lower_alu_to_scalar(nir_shader *shader, nir_instr_filter_cb cb, const void *
 }
 
 static bool
-lower_alu_vec8_16_src(nir_builder *b, nir_instr *instr, void *_data)
+lower_alu_vec8_16_src(nir_builder *b, nir_alu_instr *alu, void *_data)
 {
-   if (instr->type != nir_instr_type_alu)
-      return false;
-
-   nir_alu_instr *alu = nir_instr_as_alu(instr);
    const nir_op_info *info = &nir_op_infos[alu->op];
 
    bool changed = false;
-   b->cursor = nir_before_instr(instr);
+   b->cursor = nir_before_instr(&alu->instr);
    for (int i = 0; i < info->num_inputs; i++) {
       if (alu->src[i].src.ssa->num_components < 8 || info->input_sizes[i])
          continue;
@@ -492,7 +488,7 @@ lower_alu_vec8_16_src(nir_builder *b, nir_instr *instr, void *_data)
 bool
 nir_lower_alu_vec8_16_srcs(nir_shader *shader)
 {
-   return nir_shader_instructions_pass(shader, lower_alu_vec8_16_src,
-      nir_metadata_control_flow,
-      NULL);
+   return nir_shader_alu_pass(shader, lower_alu_vec8_16_src,
+                              nir_metadata_control_flow,
+                              NULL);
 }
diff --git a/src/gallium/drivers/r300/compiler/r500_nir_lower_fcsel.c b/src/gallium/drivers/r300/compiler/r500_nir_lower_fcsel.c
index 843aab1d9ae..027a652f2c6 100644
--- a/src/gallium/drivers/r300/compiler/r500_nir_lower_fcsel.c
+++ b/src/gallium/drivers/r300/compiler/r500_nir_lower_fcsel.c
@@ -82,13 +82,8 @@ is_comparison(nir_instr *instr)
 }
 
 static bool
-r300_nir_lower_fcsel_instr(nir_builder *b, nir_instr *instr, void *data)
+r300_nir_lower_fcsel_instr(nir_builder *b, nir_alu_instr *alu, void *data)
 {
-   if (instr->type != nir_instr_type_alu)
-      return false;
-
-   nir_alu_instr *alu = nir_instr_as_alu(instr);
-
    if (alu->op != nir_op_fcsel && alu->op != nir_op_fcsel_ge && alu->op != nir_op_fcsel_gt)
       return false;
 
@@ -126,9 +121,6 @@ r300_nir_lower_fcsel_instr(nir_builder *b, nir_instr *instr, void *data)
 bool
 r300_nir_lower_fcsel_r500(nir_shader *shader)
 {
-   bool progress = nir_shader_instructions_pass(shader,
-                                                r300_nir_lower_fcsel_instr,
-                                                nir_metadata_control_flow,
-                                                NULL);
-   return progress;
+   return nir_shader_alu_pass(shader, r300_nir_lower_fcsel_instr,
+                              nir_metadata_control_flow, NULL);
 }
diff --git a/src/gallium/drivers/zink/zink_compiler.c b/src/gallium/drivers/zink/zink_compiler.c
index a318d16d5f1..cb4b64e0e10 100644
--- a/src/gallium/drivers/zink/zink_compiler.c
+++ b/src/gallium/drivers/zink/zink_compiler.c
@@ -4896,11 +4896,8 @@ match_tex_dests(nir_shader *shader, struct zink_shader *zs, bool pre_mangle)
 }
 
 static bool
-split_bitfields_instr(nir_builder *b, nir_instr *in, void *data)
+split_bitfields_instr(nir_builder *b, nir_alu_instr *alu, void *data)
 {
-   if (in->type != nir_instr_type_alu)
-      return false;
-   nir_alu_instr *alu = nir_instr_as_alu(in);
    switch (alu->op) {
    case nir_op_ubitfield_extract:
    case nir_op_ibitfield_extract:
@@ -4912,7 +4909,7 @@ split_bitfields_instr(nir_builder *b, nir_instr *in, void *data)
    unsigned num_components = alu->def.num_components;
    if (num_components == 1)
       return false;
-   b->cursor = nir_before_instr(in);
+   b->cursor = nir_before_instr(&alu->instr);
    nir_def *dests[NIR_MAX_VEC_COMPONENTS];
    for (unsigned i = 0; i < num_components; i++) {
       if (alu->op == nir_op_bitfield_insert)
@@ -4933,8 +4930,8 @@ split_bitfields_instr(nir_builder *b, nir_instr *in, void *data)
                                           nir_channel(b, alu->src[2].src.ssa, alu->src[2].swizzle[i]));
    }
    nir_def *dest = nir_vec(b, dests, num_components);
-   nir_def_rewrite_uses_after(&alu->def, dest, in);
-   nir_instr_remove(in);
+   nir_def_rewrite_uses_after(&alu->def, dest, &alu->instr);
+   nir_instr_remove(&alu->instr);
    return true;
 }
 
@@ -4942,7 +4939,8 @@ split_bitfields_instr(nir_builder *b, nir_instr *in, void *data)
 static bool
 split_bitfields(nir_shader *shader)
 {
-   return nir_shader_instructions_pass(shader, split_bitfields_instr, nir_metadata_dominance, NULL);
+   return nir_shader_alu_pass(shader, split_bitfields_instr,
+                              nir_metadata_dominance, NULL);
 }
 
 static bool
diff --git a/src/panfrost/midgard/midgard_nir_type_csel.c b/src/panfrost/midgard/midgard_nir_type_csel.c
index ebc699c2f46..5fd1cc4776d 100644
--- a/src/panfrost/midgard/midgard_nir_type_csel.c
+++ b/src/panfrost/midgard/midgard_nir_type_csel.c
@@ -9,12 +9,8 @@
 #include "nir_opcodes.h"
 
 static bool
-pass(nir_builder *b, nir_instr *instr, void *data)
+pass(nir_builder *b, nir_alu_instr *alu, void *data)
 {
-   if (instr->type != nir_instr_type_alu)
-      return false;
-
-   nir_alu_instr *alu = nir_instr_as_alu(instr);
    if (alu->op != nir_op_b32csel)
       return false;
 
@@ -37,9 +33,8 @@ midgard_nir_type_csel(nir_shader *shader)
       calloc(BITSET_WORDS(impl->ssa_alloc), sizeof(BITSET_WORD));
    nir_gather_types(impl, float_types, NULL);
 
-   nir_shader_instructions_pass(
-      shader, pass, nir_metadata_control_flow,
-      float_types);
+   nir_shader_alu_pass(shader, pass, nir_metadata_control_flow,
+                       float_types);
 
    free(float_types);
 }