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radeonsi/vpe: add VPE 2.0 support
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Add YUV semi-planar format and YUV packed format support.
Add multi-layer blending support.
Add 3DLut fast loading support.

Signed-off-by: Peyton Lee <peytolee@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41190>
This commit is contained in:
Peyton Lee 2026-04-27 15:45:36 +08:00 • committed by Marge Bot
parent ab878cc1ea
commit 9b06b0f219
2 changed files with 632 additions and 213 deletions
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833
src/gallium/drivers/radeonsi/si_vpe.c
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12
src/gallium/drivers/radeonsi/si_vpe.h
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@ -40,11 +40,17 @@
#define VPE_FENCE_TIMEOUT_NS 1000000000
/* VPE 1st generation only support 1 input stram */
#define VPE_STREAM_MAX_NUM 1
#define VPE_STREAM_MAX_NUM 2
#define VPE_BUFFERS_NUM 6
#define VPE_EMBBUF_SIZE 50000
#define VPE_EMBBUF_SIZE 300000
#define VPE_LUT_DIM 17
#define VPE_LUTLF_DIM 33
/* 33 x 33 x 33 x 4(RGBA) x sizeof(uint_16) Bytes */
/* After 256 alignment -> 64 x 64 x 64 x 4 x 2 */
#define VPE_FASTLOAD_SIZE 2097152
#define TM_GMLIB_BITDEPTH 4095.0f
#define TM_GPU_BITDEPTH 65535
#define VPE_MAX_GEOMETRIC_DOWNSCALE 4.f
@ -73,6 +79,7 @@ struct vpe_video_processor {
struct vpe_init_data vpe_data;
struct vpe_build_bufs *vpe_build_bufs;
struct vpe_build_param *vpe_build_param;
struct pipe_fence_handle *last_fence;
uint8_t log_level;
@ -84,6 +91,7 @@ struct vpe_video_processor {
/* For HDR content display */
void *gm_handle;
uint16_t *lut_data;
struct si_resource *fl3dlut_buf;
/* For Geometric scaling */
float scaling_ratios[2];