fdo-mirrors/mesa
1
0
Fork 0
mirror of https://gitlab.freedesktop.org/mesa/mesa.git synced 2026-05-09 06:48:06 +02:00
Code Issues Projects Releases Packages Wiki Activity Actions 1

Numerous small fixed to PPU-SPU vertex shader protocol

Browse source
This commit is contained in:
Ian Romanick 2008-01-30 19:40:24 -08:00
parent de949a471e
commit 9ad986b887
2 changed files with 34 additions and 12 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

19
src/mesa/pipe/cell/common.h
View file

@ -124,10 +124,10 @@ struct cell_command_clear_surface
*/
struct cell_array_info
{
void *base; /**< Base address of the 0th element. */
uint attr; /**< Attribute that this state if for. */
uint pitch; /**< Byte pitch from one entry to the next. */
enum pipe_format format; /**< Pipe format of each entry. */
uint64_t base; /**< Base address of the 0th element. */
uint attr; /**< Attribute that this state if for. */
uint pitch; /**< Byte pitch from one entry to the next. */
uint format; /**< Pipe format of each entry. */
};
@ -135,11 +135,13 @@ struct cell_shader_info
{
unsigned num_outputs;
void *declarations;
uint64_t declarations;
unsigned num_declarations;
void *instructions;
uint64_t instructions;
unsigned num_instructions;
void *uniforms;
uint64_t uniforms;
uint64_t immediates;
unsigned num_immediates;
} ALIGN16_ATTRIB;
@ -151,6 +153,9 @@ struct cell_command_vs
unsigned num_elts;
unsigned elts[SPU_VERTS_PER_BATCH];
uint64_t vOut[SPU_VERTS_PER_BATCH];
float plane[12][4];
unsigned nr_planes;
unsigned nr_attrs;
} ALIGN16_ATTRIB;

27
src/mesa/pipe/cell/spu/spu_vertex_shader.c
View file

@ -187,12 +187,22 @@ spu_bind_vertex_shader(struct spu_vs_context *draw,
}
unsigned char immediates[(sizeof(float) * 4 * TGSI_EXEC_NUM_IMMEDIATES) + 32]
ALIGN16_ATTRIB;
void
spu_execute_vertex_shader(struct spu_vs_context *draw,
const struct cell_command_vs *vs)
const struct cell_command_vs *vs)
{
unsigned i;
unsigned j;
const uint64_t immediate_addr = vs->shader.immediates;
const unsigned immediate_size =
ROUNDUP16((sizeof(float) * 4 * vs->shader.num_immediates)
+ (immediate_addr & 0x0f));
mfc_get(immediates, immediate_addr & ~0x0f, immediate_size,
TAG_VERTEX_BUFFER, 0, 0);
draw->machine.Instructions = (struct tgsi_full_instruction *)
vs->shader.instructions;
@ -202,10 +212,17 @@ spu_execute_vertex_shader(struct spu_vs_context *draw,
vs->shader.declarations;
draw->machine.NumDeclarations = vs->shader.num_declarations;
draw->vertex_fetch.nr_attrs = vs->nr_attrs;
wait_on_mask(1 << TAG_VERTEX_BUFFER);
(void) memcpy(& draw->machine.Imms, &immediates[immediate_addr & 0x0f],
sizeof(float) * 4 * vs->shader.num_immediates);
spu_bind_vertex_shader(draw, vs->shader.uniforms,
NULL, -1,
vs->shader.num_outputs);
vs->plane, vs->nr_planes,
vs->shader.num_outputs);
for (i = 0; i < vs->num_elts; i += 4) {
const unsigned batch_size = MIN2(vs->num_elts - i, 4);