From 9aaed82543e1ce9450143e353bb362f37ed517da Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Tapani=20P=C3=A4lli?= Date: Thu, 5 Feb 2026 10:10:18 +0200 Subject: [PATCH] anv: set DisableAnyMCTRresponsefix to zero on init MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This is to make sure early culling related Wa_16020518922 is enabled properly. Cc: mesa-stable Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/14204 Signed-off-by: Tapani Pälli Reviewed-by: Lionel Landwerlin Part-of: --- src/intel/vulkan/genX_init_state.c | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/src/intel/vulkan/genX_init_state.c b/src/intel/vulkan/genX_init_state.c index 1cb00c17375..2441ee6e531 100644 --- a/src/intel/vulkan/genX_init_state.c +++ b/src/intel/vulkan/genX_init_state.c @@ -628,6 +628,17 @@ init_render_queue_state(struct anv_queue *queue, bool is_companion_rcs_batch) } #endif +#if GFX_VERx10 >= 300 + /* Set value explicitly on init to override possible wrong setting. This bit + * default changed from Xe2 to Xe3 and is required to be zero for + * Wa_16020518922 as mentioned in bspec 55893. + */ + anv_batch_write_reg(batch, GENX(CHICKEN_RASTER_2), reg) { + reg.DisableAnyMCTRresponsefix = false; + reg.DisableAnyMCTRresponsefixMask = true; + } +#endif + /* Set the "CONSTANT_BUFFER Address Offset Disable" bit, so * 3DSTATE_CONSTANT_XS buffer 0 is an absolute address. *