From 99a4d0fcad491426d1cde5bbd9d0c1e4c06b801a Mon Sep 17 00:00:00 2001 From: Alyssa Rosenzweig Date: Mon, 18 Mar 2024 14:58:03 -0400 Subject: [PATCH] asahi: don't allocate tib space for gaps Signed-off-by: Alyssa Rosenzweig Part-of: --- src/asahi/lib/agx_tilebuffer.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/src/asahi/lib/agx_tilebuffer.c b/src/asahi/lib/agx_tilebuffer.c index 7b4fc371abb..280a1505b5c 100644 --- a/src/asahi/lib/agx_tilebuffer.c +++ b/src/asahi/lib/agx_tilebuffer.c @@ -60,6 +60,12 @@ agx_build_tilebuffer_layout(const enum pipe_format *formats, uint8_t nr_cbufs, for (unsigned rt = 0; rt < nr_cbufs; ++rt) { tib.logical_format[rt] = formats[rt]; + /* If there are gaps in the layout, don't allocate holes. Obscure, + * PIPE_FORMAT_NONE has a size of 1, not 0. + */ + if (formats[rt] == PIPE_FORMAT_NONE) + continue; + /* Require natural alignment for tilebuffer allocations. This could be * optimized, but this shouldn't be a problem in practice. */