From 994dd51b3b759a611a8ef5b767f76a9b64243a9f Mon Sep 17 00:00:00 2001 From: Lionel Landwerlin Date: Tue, 3 Jun 2025 15:41:50 +0300 Subject: [PATCH] brw: fix brw_nir_fs_needs_null_rt helper In 9b42215e0d ("iris: ensure null render target for specific cases") I wrongly assumed that writing gl_SampleMask would only happen in multisampled cases. Signed-off-by: Lionel Landwerlin Fixes: 9b42215e0d ("iris: ensure null render target for specific cases") Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/13292 Reviewed-by: Ivan Briano Part-of: (cherry picked from commit 79498a0849356f8260d761a87e74f14957c4b63f) --- .pick_status.json | 2 +- src/gallium/drivers/iris/iris_program.c | 1 - src/intel/compiler/brw_nir.h | 13 ++++--------- src/intel/vulkan/anv_pipeline.c | 1 - 4 files changed, 5 insertions(+), 12 deletions(-) diff --git a/.pick_status.json b/.pick_status.json index eb4804d5c06..ce38f5d19b2 100644 --- a/.pick_status.json +++ b/.pick_status.json @@ -314,7 +314,7 @@ "description": "brw: fix brw_nir_fs_needs_null_rt helper", "nominated": true, "nomination_type": 2, - "resolution": 0, + "resolution": 1, "main_sha": null, "because_sha": "9b42215e0d6762151e3063fd83e779dee17ad058", "notes": null diff --git a/src/gallium/drivers/iris/iris_program.c b/src/gallium/drivers/iris/iris_program.c index 4af7b8e11e7..229ba9ce46c 100644 --- a/src/gallium/drivers/iris/iris_program.c +++ b/src/gallium/drivers/iris/iris_program.c @@ -2662,7 +2662,6 @@ iris_compile_fs(struct iris_screen *screen, brw_nir_lower_fs_outputs(nir); int null_rts = brw_nir_fs_needs_null_rt(devinfo, nir, - key->multisample_fbo, key->alpha_to_coverage) ? 1 : 0; struct iris_binding_table bt; diff --git a/src/intel/compiler/brw_nir.h b/src/intel/compiler/brw_nir.h index d520b14a7e7..acc277f586e 100644 --- a/src/intel/compiler/brw_nir.h +++ b/src/intel/compiler/brw_nir.h @@ -143,8 +143,7 @@ brw_nir_ubo_surface_index_get_bti(nir_src src) /* Returns true if a fragment shader needs at least one render target */ static inline bool brw_nir_fs_needs_null_rt(const struct intel_device_info *devinfo, - nir_shader *nir, - bool multisample_fbo, bool alpha_to_coverage) + nir_shader *nir, bool alpha_to_coverage) { assert(nir->info.stage == MESA_SHADER_FRAGMENT); @@ -158,15 +157,11 @@ brw_nir_fs_needs_null_rt(const struct intel_device_info *devinfo, * output. */ if (nir->info.outputs_written & (BITFIELD_BIT(FRAG_RESULT_DEPTH) | - BITFIELD_BIT(FRAG_RESULT_STENCIL))) + BITFIELD_BIT(FRAG_RESULT_STENCIL) | + BITFIELD64_BIT(FRAG_RESULT_SAMPLE_MASK))) return true; - uint64_t relevant_outputs = 0; - if (multisample_fbo) - relevant_outputs |= BITFIELD64_BIT(FRAG_RESULT_SAMPLE_MASK); - - return (alpha_to_coverage || - (nir->info.outputs_written & relevant_outputs) != 0); + return alpha_to_coverage; } void brw_preprocess_nir(const struct brw_compiler *compiler, diff --git a/src/intel/vulkan/anv_pipeline.c b/src/intel/vulkan/anv_pipeline.c index 5624db278dc..4b62a6f6057 100644 --- a/src/intel/vulkan/anv_pipeline.c +++ b/src/intel/vulkan/anv_pipeline.c @@ -1506,7 +1506,6 @@ anv_pipeline_link_fs(const struct brw_compiler *compiler, num_rt_bindings = stage->key.wm.nr_color_regions; } else if (brw_nir_fs_needs_null_rt( compiler->devinfo, stage->nir, - stage->key.wm.multisample_fbo != INTEL_NEVER, stage->key.wm.alpha_to_coverage != INTEL_NEVER)) { /* Ensure the shader doesn't discard the writes */ stage->key.wm.color_outputs_valid = 0x1;