From 990d4a19f84df9bbc619e3e5d5946e31ebee6f40 Mon Sep 17 00:00:00 2001 From: Marc Alcala Prieto Date: Thu, 11 Jun 2026 12:30:13 +0200 Subject: [PATCH] pan/compiler: Rename multiview to per_view_outputs On v14+, multiview is not lowered to per-view output stores. Rename "multiview" to "per_view_outputs" to make it clear that this logic only applies when the shader uses nir_intrinsic_store_per_view_output. Reviewed-by: Olivia Lee Part-of: --- src/panfrost/compiler/pan_nir_lower_vs_outputs.c | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/src/panfrost/compiler/pan_nir_lower_vs_outputs.c b/src/panfrost/compiler/pan_nir_lower_vs_outputs.c index 8e9ac4a8472..3f218d179f7 100644 --- a/src/panfrost/compiler/pan_nir_lower_vs_outputs.c +++ b/src/panfrost/compiler/pan_nir_lower_vs_outputs.c @@ -20,12 +20,12 @@ struct lower_vs_outputs_ctx { nir_variable *variables[PAN_MAX_VARYINGS]; uint8_t per_view_written[PAN_MAX_VARYINGS]; unsigned used_buckets; - bool uses_multiview; + bool uses_per_view_outputs; }; static bool -valhal_writes_extended_fifo(uint64_t outputs_written, - bool no_psiz, bool multiview) +valhal_writes_extended_fifo(uint64_t outputs_written, bool no_psiz, + bool per_view_outputs) { uint64_t ex_fifo_written = outputs_written & VALHAL_EX_FIFO_VARYING_BITS; if (ex_fifo_written == 0) @@ -35,7 +35,7 @@ valhal_writes_extended_fifo(uint64_t outputs_written, * output writes. We don't currently patch these offsets in the no_psiz * variant, so we need the extended format, regardless of point size. */ - if (multiview) + if (per_view_outputs) return true; /* If we're not rendering in points mode, the no_psiz variant has point @@ -227,7 +227,7 @@ gather_vs_outputs(struct nir_builder *b, ctx->per_view_written[slot_idx] |= BITFIELD_BIT(view_index); ctx->used_buckets |= BITFIELD_BIT(va_shader_output_from_loc(sem.location)); - ctx->uses_multiview |= is_per_view; + ctx->uses_per_view_outputs |= is_per_view; b->cursor = nir_instr_remove(&intr->instr); nir_variable *var = get_or_create_var(b, ctx, intr); @@ -278,7 +278,7 @@ pan_nir_lower_vs_outputs(nir_shader *shader, uint64_t gpu_id, .variables = {NULL, }, .per_view_written = {0, }, .used_buckets = 0, - .uses_multiview = false, + .uses_per_view_outputs = false, }; /* We use uint8 as a viewcount bitmask. per_view_written is always 0 * on v14+. */ @@ -295,12 +295,12 @@ pan_nir_lower_vs_outputs(nir_shader *shader, uint64_t gpu_id, assert(needs_extended_fifo); const uint64_t outputs = shader->info.outputs_written; ctx.has_extended_fifo = - valhal_writes_extended_fifo(outputs, false, ctx.uses_multiview); + valhal_writes_extended_fifo(outputs, false, ctx.uses_per_view_outputs); /* Export if we need ex_fifo even without psiz. The backend needs to * know this because we can patch psiz out. */ *needs_extended_fifo = - valhal_writes_extended_fifo(outputs, true, ctx.uses_multiview); + valhal_writes_extended_fifo(outputs, true, ctx.uses_per_view_outputs); } nir_builder builder = nir_builder_at(nir_after_impl(impl));