i965/brw_reg: Make the accumulator register take an explicit width.

The big pile of patches I just pushed regresses about 25 piglit tests on
SNB.  This fixes the regressions.

Signed-off-by: Jason Ekstrand <jason.ekstrand@intel.com>
This commit is contained in:
Jason Ekstrand 2014-09-30 10:15:23 -07:00
parent 6b65847835
commit 98d00d6640
3 changed files with 15 additions and 10 deletions

View file

@ -636,7 +636,8 @@ fs_visitor::visit(ir_expression *ir)
if (brw->gen >= 7)
no16("SIMD16 explicit accumulator operands unsupported\n");
struct brw_reg acc = retype(brw_acc_reg(), this->result.type);
struct brw_reg acc = retype(brw_acc_reg(dispatch_width),
this->result.type);
emit(MUL(acc, op[0], op[1]));
emit(MACH(reg_null_d, op[0], op[1]));
@ -650,7 +651,8 @@ fs_visitor::visit(ir_expression *ir)
if (brw->gen >= 7)
no16("SIMD16 explicit accumulator operands unsupported\n");
struct brw_reg acc = retype(brw_acc_reg(), this->result.type);
struct brw_reg acc = retype(brw_acc_reg(dispatch_width),
this->result.type);
emit(MUL(acc, op[0], op[1]));
emit(MACH(this->result, op[0], op[1]));
@ -665,7 +667,8 @@ fs_visitor::visit(ir_expression *ir)
if (brw->gen >= 7)
no16("SIMD16 explicit accumulator operands unsupported\n");
struct brw_reg acc = retype(brw_acc_reg(), BRW_REGISTER_TYPE_UD);
struct brw_reg acc = retype(brw_acc_reg(dispatch_width),
BRW_REGISTER_TYPE_UD);
emit(ADDC(reg_null_ud, op[0], op[1]));
emit(MOV(this->result, fs_reg(acc)));
@ -675,7 +678,8 @@ fs_visitor::visit(ir_expression *ir)
if (brw->gen >= 7)
no16("SIMD16 explicit accumulator operands unsupported\n");
struct brw_reg acc = retype(brw_acc_reg(), BRW_REGISTER_TYPE_UD);
struct brw_reg acc = retype(brw_acc_reg(dispatch_width),
BRW_REGISTER_TYPE_UD);
emit(SUBB(reg_null_ud, op[0], op[1]));
emit(MOV(this->result, fs_reg(acc)));

View file

@ -639,9 +639,10 @@ brw_ip_reg(void)
}
static inline struct brw_reg
brw_acc_reg(void)
brw_acc_reg(unsigned width)
{
return brw_vec8_reg(BRW_ARCHITECTURE_REGISTER_FILE, BRW_ARF_ACCUMULATOR, 0);
return brw_vecn_reg(width, BRW_ARCHITECTURE_REGISTER_FILE,
BRW_ARF_ACCUMULATOR, 0);
}
static inline struct brw_reg

View file

@ -1455,7 +1455,7 @@ vec4_visitor::visit(ir_expression *ir)
else
emit(MUL(result_dst, op[0], op[1]));
} else {
struct brw_reg acc = retype(brw_acc_reg(), result_dst.type);
struct brw_reg acc = retype(brw_acc_reg(8), result_dst.type);
emit(MUL(acc, op[0], op[1]));
emit(MACH(dst_null_d(), op[0], op[1]));
@ -1466,7 +1466,7 @@ vec4_visitor::visit(ir_expression *ir)
}
break;
case ir_binop_imul_high: {
struct brw_reg acc = retype(brw_acc_reg(), result_dst.type);
struct brw_reg acc = retype(brw_acc_reg(8), result_dst.type);
emit(MUL(acc, op[0], op[1]));
emit(MACH(result_dst, op[0], op[1]));
@ -1478,14 +1478,14 @@ vec4_visitor::visit(ir_expression *ir)
emit_math(SHADER_OPCODE_INT_QUOTIENT, result_dst, op[0], op[1]);
break;
case ir_binop_carry: {
struct brw_reg acc = retype(brw_acc_reg(), BRW_REGISTER_TYPE_UD);
struct brw_reg acc = retype(brw_acc_reg(8), BRW_REGISTER_TYPE_UD);
emit(ADDC(dst_null_ud(), op[0], op[1]));
emit(MOV(result_dst, src_reg(acc)));
break;
}
case ir_binop_borrow: {
struct brw_reg acc = retype(brw_acc_reg(), BRW_REGISTER_TYPE_UD);
struct brw_reg acc = retype(brw_acc_reg(8), BRW_REGISTER_TYPE_UD);
emit(SUBB(dst_null_ud(), op[0], op[1]));
emit(MOV(result_dst, src_reg(acc)));