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i965/brw_reg: Make the accumulator register take an explicit width.
The big pile of patches I just pushed regresses about 25 piglit tests on SNB. This fixes the regressions. Signed-off-by: Jason Ekstrand <jason.ekstrand@intel.com>
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parent
6b65847835
commit
98d00d6640
3 changed files with 15 additions and 10 deletions
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@ -636,7 +636,8 @@ fs_visitor::visit(ir_expression *ir)
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if (brw->gen >= 7)
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no16("SIMD16 explicit accumulator operands unsupported\n");
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struct brw_reg acc = retype(brw_acc_reg(), this->result.type);
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struct brw_reg acc = retype(brw_acc_reg(dispatch_width),
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this->result.type);
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emit(MUL(acc, op[0], op[1]));
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emit(MACH(reg_null_d, op[0], op[1]));
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@ -650,7 +651,8 @@ fs_visitor::visit(ir_expression *ir)
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if (brw->gen >= 7)
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no16("SIMD16 explicit accumulator operands unsupported\n");
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struct brw_reg acc = retype(brw_acc_reg(), this->result.type);
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struct brw_reg acc = retype(brw_acc_reg(dispatch_width),
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this->result.type);
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emit(MUL(acc, op[0], op[1]));
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emit(MACH(this->result, op[0], op[1]));
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@ -665,7 +667,8 @@ fs_visitor::visit(ir_expression *ir)
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if (brw->gen >= 7)
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no16("SIMD16 explicit accumulator operands unsupported\n");
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struct brw_reg acc = retype(brw_acc_reg(), BRW_REGISTER_TYPE_UD);
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struct brw_reg acc = retype(brw_acc_reg(dispatch_width),
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BRW_REGISTER_TYPE_UD);
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emit(ADDC(reg_null_ud, op[0], op[1]));
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emit(MOV(this->result, fs_reg(acc)));
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@ -675,7 +678,8 @@ fs_visitor::visit(ir_expression *ir)
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if (brw->gen >= 7)
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no16("SIMD16 explicit accumulator operands unsupported\n");
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struct brw_reg acc = retype(brw_acc_reg(), BRW_REGISTER_TYPE_UD);
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struct brw_reg acc = retype(brw_acc_reg(dispatch_width),
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BRW_REGISTER_TYPE_UD);
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emit(SUBB(reg_null_ud, op[0], op[1]));
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emit(MOV(this->result, fs_reg(acc)));
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@ -639,9 +639,10 @@ brw_ip_reg(void)
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}
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static inline struct brw_reg
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brw_acc_reg(void)
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brw_acc_reg(unsigned width)
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{
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return brw_vec8_reg(BRW_ARCHITECTURE_REGISTER_FILE, BRW_ARF_ACCUMULATOR, 0);
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return brw_vecn_reg(width, BRW_ARCHITECTURE_REGISTER_FILE,
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BRW_ARF_ACCUMULATOR, 0);
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}
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static inline struct brw_reg
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@ -1455,7 +1455,7 @@ vec4_visitor::visit(ir_expression *ir)
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else
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emit(MUL(result_dst, op[0], op[1]));
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} else {
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struct brw_reg acc = retype(brw_acc_reg(), result_dst.type);
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struct brw_reg acc = retype(brw_acc_reg(8), result_dst.type);
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emit(MUL(acc, op[0], op[1]));
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emit(MACH(dst_null_d(), op[0], op[1]));
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@ -1466,7 +1466,7 @@ vec4_visitor::visit(ir_expression *ir)
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}
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break;
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case ir_binop_imul_high: {
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struct brw_reg acc = retype(brw_acc_reg(), result_dst.type);
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struct brw_reg acc = retype(brw_acc_reg(8), result_dst.type);
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emit(MUL(acc, op[0], op[1]));
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emit(MACH(result_dst, op[0], op[1]));
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@ -1478,14 +1478,14 @@ vec4_visitor::visit(ir_expression *ir)
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emit_math(SHADER_OPCODE_INT_QUOTIENT, result_dst, op[0], op[1]);
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break;
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case ir_binop_carry: {
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struct brw_reg acc = retype(brw_acc_reg(), BRW_REGISTER_TYPE_UD);
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struct brw_reg acc = retype(brw_acc_reg(8), BRW_REGISTER_TYPE_UD);
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emit(ADDC(dst_null_ud(), op[0], op[1]));
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emit(MOV(result_dst, src_reg(acc)));
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break;
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}
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case ir_binop_borrow: {
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struct brw_reg acc = retype(brw_acc_reg(), BRW_REGISTER_TYPE_UD);
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struct brw_reg acc = retype(brw_acc_reg(8), BRW_REGISTER_TYPE_UD);
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emit(SUBB(dst_null_ud(), op[0], op[1]));
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emit(MOV(result_dst, src_reg(acc)));
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