fdo-mirrors/mesa
1
0
Fork 0
mirror of https://gitlab.freedesktop.org/mesa/mesa.git synced 2025-12-29 01:30:08 +01:00
Code Issues Projects Releases Packages Wiki Activity Actions 1

ac/surface: add radeonsi exported modifiers to supported list

Browse source 
radeonsi will export texture with these modifiers.

piglit tests:
spec@ext_image_dma_buf_import@ext_image_dma_buf_import-export-tex
spec@ext_image_dma_buf_import@ext_image_dma_buf_import-tex-modifier

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Acked-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31658>
This commit is contained in:
Qiang Yu 2024-10-21 16:29:55 +08:00 • committed by Marge Bot
parent 1b0ec56c40
commit 98cd68ec05
2 changed files with 45 additions and 1 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

1
src/amd/common/ac_drm_fourcc.h
View file

@ -26,6 +26,7 @@ typedef uint64_t __u64;
#define AMD_FMT_MOD_TILE_VER_GFX12 5
#define AMD_FMT_MOD_TILE_GFX9_64K_S 9
#define AMD_FMT_MOD_TILE_GFX9_64K_D 10
#define AMD_FMT_MOD_TILE_GFX9_4K_D_X 22
#define AMD_FMT_MOD_TILE_GFX9_64K_S_X 25
#define AMD_FMT_MOD_TILE_GFX9_64K_D_X 26
#define AMD_FMT_MOD_TILE_GFX9_64K_R_X 27

45
src/amd/common/ac_surface.c
View file

@ -292,7 +292,7 @@ bool ac_is_modifier_supported(const struct radeon_info *info,
uint32_t allowed_swizzles = 0xFFFFFFFF;
switch(info->gfx_level) {
case GFX9:
allowed_swizzles = ac_modifier_has_dcc(modifier) ? 0x06000000 : 0x06660660;
allowed_swizzles = ac_modifier_has_dcc(modifier) ? 0x06400000 : 0x06660660;
break;
case GFX10:
case GFX10_3:
@ -349,6 +349,7 @@ bool ac_get_supported_modifiers(const struct radeon_info *info,
++current_mod; \
}
const unsigned block_size_bits_4k = 12;
const unsigned block_size_bits_64k = 16;
const unsigned block_size_bits_256k = 18;
@ -363,6 +364,9 @@ bool ac_get_supported_modifiers(const struct radeon_info *info,
* in the list. */
switch (info->gfx_level) {
case GFX9: {
unsigned pipe_xor_bits_4k = MIN2(pipes + se, block_size_bits_4k - 8);
unsigned bank_xor_bits_4k = MIN2(banks, block_size_bits_4k - 8 - pipe_xor_bits_4k);
unsigned pipe_xor_bits_64k = MIN2(pipes + se, block_size_bits_64k - 8);
unsigned bank_xor_bits_64k = MIN2(banks, block_size_bits_64k - 8 - pipe_xor_bits_64k);
@ -379,6 +383,11 @@ bool ac_get_supported_modifiers(const struct radeon_info *info,
AMD_FMT_MOD_SET(PIPE_XOR_BITS, pipe_xor_bits_64k) |
AMD_FMT_MOD_SET(BANK_XOR_BITS, bank_xor_bits_64k);
uint64_t dcc_4k =
common_dcc |
AMD_FMT_MOD_SET(PIPE_XOR_BITS, pipe_xor_bits_4k) |
AMD_FMT_MOD_SET(BANK_XOR_BITS, bank_xor_bits_4k);
ADD_MOD(AMD_FMT_MOD |
AMD_FMT_MOD_SET(TILE, AMD_FMT_MOD_TILE_GFX9_64K_D_X) |
AMD_FMT_MOD_SET(TILE_VERSION, AMD_FMT_MOD_TILE_VER_GFX9) |
@ -413,6 +422,14 @@ bool ac_get_supported_modifiers(const struct radeon_info *info,
AMD_FMT_MOD_SET(RB, rb))
}
/* OpenGL exported modifier for small textures. */
ADD_MOD(AMD_FMT_MOD |
AMD_FMT_MOD_SET(TILE, AMD_FMT_MOD_TILE_GFX9_4K_D_X) |
AMD_FMT_MOD_SET(TILE_VERSION, AMD_FMT_MOD_TILE_VER_GFX9) |
AMD_FMT_MOD_SET(DCC_PIPE_ALIGN, 1) |
dcc_4k |
AMD_FMT_MOD_SET(PIPE, pipes) |
AMD_FMT_MOD_SET(RB, rb))
ADD_MOD(AMD_FMT_MOD |
AMD_FMT_MOD_SET(TILE, AMD_FMT_MOD_TILE_GFX9_64K_D_X) |
@ -426,6 +443,13 @@ bool ac_get_supported_modifiers(const struct radeon_info *info,
AMD_FMT_MOD_SET(PIPE_XOR_BITS, pipe_xor_bits_64k) |
AMD_FMT_MOD_SET(BANK_XOR_BITS, bank_xor_bits_64k));
/* OpenGL exported modifier for small textures. */
ADD_MOD(AMD_FMT_MOD |
AMD_FMT_MOD_SET(TILE, AMD_FMT_MOD_TILE_GFX9_4K_D_X) |
AMD_FMT_MOD_SET(TILE_VERSION, AMD_FMT_MOD_TILE_VER_GFX9) |
AMD_FMT_MOD_SET(PIPE_XOR_BITS, pipe_xor_bits_4k) |
AMD_FMT_MOD_SET(BANK_XOR_BITS, bank_xor_bits_4k))
ADD_MOD(AMD_FMT_MOD |
AMD_FMT_MOD_SET(TILE, AMD_FMT_MOD_TILE_GFX9_64K_D) |
AMD_FMT_MOD_SET(TILE_VERSION, AMD_FMT_MOD_TILE_VER_GFX9));
@ -441,6 +465,10 @@ bool ac_get_supported_modifiers(const struct radeon_info *info,
case GFX10_3: {
bool rbplus = info->gfx_level >= GFX10_3;
unsigned pipe_xor_bits_4k = MIN2(pipes, block_size_bits_4k - 8);
unsigned pkrs_4k =
rbplus ? MIN2(pkrs, block_size_bits_4k - 8 - pipe_xor_bits_4k) : 0;
unsigned pipe_xor_bits_64k = MIN2(pipes, block_size_bits_64k - 8);
unsigned pkrs_64k =
rbplus ? MIN2(pkrs, block_size_bits_64k - 8 - pipe_xor_bits_64k) : 0;
@ -477,6 +505,13 @@ bool ac_get_supported_modifiers(const struct radeon_info *info,
AMD_FMT_MOD_SET(PIPE_XOR_BITS, pipe_xor_bits_64k) |
AMD_FMT_MOD_SET(PACKERS, pkrs_64k))
/* OpenGL exported modifier for small textures. */
ADD_MOD(AMD_FMT_MOD |
AMD_FMT_MOD_SET(TILE_VERSION, version) |
AMD_FMT_MOD_SET(TILE, AMD_FMT_MOD_TILE_GFX9_4K_D_X) |
AMD_FMT_MOD_SET(PIPE_XOR_BITS, pipe_xor_bits_4k) |
AMD_FMT_MOD_SET(PACKERS, pkrs_4k))
if (util_format_get_blocksizebits(format) != 32) {
ADD_MOD(AMD_FMT_MOD |
AMD_FMT_MOD_SET(TILE, AMD_FMT_MOD_TILE_GFX9_64K_D) |
@ -493,6 +528,7 @@ bool ac_get_supported_modifiers(const struct radeon_info *info,
case GFX11:
case GFX11_5: {
/* GFX11 has new microblock organization. No S modes for 2D. */
unsigned pipe_xor_bits_4k = MIN2(pipes, block_size_bits_4k - 8);
unsigned pipe_xor_bits_64k = MIN2(pipes, block_size_bits_64k - 8);
unsigned pipe_xor_bits_256k = MIN2(pipes, block_size_bits_256k - 8);
unsigned num_pipes = 1 << pipes;
@ -565,6 +601,13 @@ bool ac_get_supported_modifiers(const struct radeon_info *info,
ADD_MOD(modifier_r_x)
}
/* OpenGL exported modifier for small textures. */
ADD_MOD(AMD_FMT_MOD |
AMD_FMT_MOD_SET(TILE_VERSION, AMD_FMT_MOD_TILE_VER_GFX11) |
AMD_FMT_MOD_SET(TILE, AMD_FMT_MOD_TILE_GFX9_4K_D_X) |
AMD_FMT_MOD_SET(PIPE_XOR_BITS, pipe_xor_bits_4k) |
AMD_FMT_MOD_SET(PACKERS, pkrs))
/* Add one that is compatible with other gfx11 chips. */
ADD_MOD(AMD_FMT_MOD |
AMD_FMT_MOD_SET(TILE_VERSION, AMD_FMT_MOD_TILE_VER_GFX11) |