fdo-mirrors/mesa
1
0
Fork 0
mirror of https://gitlab.freedesktop.org/mesa/mesa.git synced 2025-12-24 21:50:12 +01:00
Code Issues Projects Releases Packages Wiki Activity Actions 1

i965/fs: Implement HSW BFI exec size workarounds in the SIMD lowering pass.

Browse source 
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
This commit is contained in:
Francisco Jerez 2016-05-17 16:00:19 -07:00
parent 88d9cc1563
commit 98c8bef01c
1 changed files with 8 additions and 2 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

10
src/mesa/drivers/dri/i965/brw_fs.cpp
View file

@ -4745,8 +4745,6 @@ get_lowered_simd_width(const struct brw_device_info *devinfo,
case BRW_OPCODE_F16TO32:
case BRW_OPCODE_BFREV:
case BRW_OPCODE_BFE:
case BRW_OPCODE_BFI1:
case BRW_OPCODE_BFI2:
case BRW_OPCODE_ADD:
case BRW_OPCODE_MUL:
case BRW_OPCODE_AVG:
@ -4781,6 +4779,14 @@ get_lowered_simd_width(const struct brw_device_info *devinfo,
!inst->dst.is_null() ? 8 : ~0);
return MIN2(max_width, get_fpu_lowered_simd_width(devinfo, inst));
}
case BRW_OPCODE_BFI1:
case BRW_OPCODE_BFI2:
/* The Haswell WaForceSIMD8ForBFIInstruction workaround says that we
* should
* "Force BFI instructions to be executed always in SIMD8."
*/
return MIN2(devinfo->is_haswell ? 8 : ~0u,
get_fpu_lowered_simd_width(devinfo, inst));
case SHADER_OPCODE_RCP:
case SHADER_OPCODE_RSQ: