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radeonsi: implement line and polygon smoothing
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
This commit is contained in:
parent
303d23e10d
commit
98a2398222
4 changed files with 49 additions and 10 deletions
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@ -186,6 +186,7 @@ struct si_context {
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struct r600_atom msaa_sample_locs;
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struct r600_atom msaa_config;
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int ps_iter_samples;
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bool smoothing_enabled;
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/* Vertex and index buffers. */
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bool vertex_buffers_dirty;
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@ -617,6 +617,8 @@ static void *si_create_rs_state(struct pipe_context *ctx,
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rs->clip_plane_enable = state->clip_plane_enable;
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rs->line_stipple_enable = state->line_stipple_enable;
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rs->poly_stipple_enable = state->poly_stipple_enable;
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rs->line_smooth = state->line_smooth;
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rs->poly_smooth = state->poly_smooth;
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polygon_dual_mode = (state->fill_front != PIPE_POLYGON_MODE_FILL ||
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state->fill_back != PIPE_POLYGON_MODE_FILL);
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@ -686,7 +688,9 @@ static void *si_create_rs_state(struct pipe_context *ctx,
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si_pm4_set_reg(pm4, R_028A08_PA_SU_LINE_CNTL, S_028A08_WIDTH(tmp));
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si_pm4_set_reg(pm4, R_028A48_PA_SC_MODE_CNTL_0,
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S_028A48_LINE_STIPPLE_ENABLE(state->line_stipple_enable) |
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S_028A48_MSAA_ENABLE(state->multisample) |
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S_028A48_MSAA_ENABLE(state->multisample ||
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state->poly_smooth ||
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state->line_smooth) |
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S_028A48_VPORT_SCISSOR_ENABLE(state->scissor));
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si_pm4_set_reg(pm4, R_028BE4_PA_SU_VTX_CNTL,
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@ -945,10 +949,15 @@ static void si_emit_db_render_state(struct si_context *sctx, struct r600_atom *s
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r600_write_context_reg(cs, R_028010_DB_RENDER_OVERRIDE2, 0);
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}
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db_shader_control = S_02880C_Z_ORDER(V_02880C_EARLY_Z_THEN_LATE_Z) |
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S_02880C_ALPHA_TO_MASK_DISABLE(sctx->framebuffer.cb0_is_integer) |
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db_shader_control = S_02880C_ALPHA_TO_MASK_DISABLE(sctx->framebuffer.cb0_is_integer) |
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sctx->ps_db_shader_control;
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/* Bug workaround for smoothing (overrasterization) on SI. */
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if (sctx->b.chip_class == SI && sctx->smoothing_enabled)
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db_shader_control |= S_02880C_Z_ORDER(V_02880C_LATE_Z);
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else
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db_shader_control |= S_02880C_Z_ORDER(V_02880C_EARLY_Z_THEN_LATE_Z);
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/* Disable the gl_SampleMask fragment shader output if MSAA is disabled. */
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if (sctx->framebuffer.nr_samples <= 1 || (rs && !rs->multisample_enable))
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db_shader_control &= C_02880C_MASK_EXPORT_ENABLE;
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@ -2094,7 +2103,18 @@ static void si_set_framebuffer_state(struct pipe_context *ctx,
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ctx->set_constant_buffer(ctx, PIPE_SHADER_FRAGMENT,
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SI_DRIVER_STATE_CONST_BUF, &constbuf);
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sctx->msaa_sample_locs.dirty = true;
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/* Smoothing (only possible with nr_samples == 1) uses the same
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* sample locations as the MSAA it simulates.
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*
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* Therefore, don't update the sample locations when
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* transitioning from no AA to smoothing-equivalent AA, and
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* vice versa.
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*/
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if ((sctx->framebuffer.nr_samples != 1 ||
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old_nr_samples != SI_NUM_SMOOTH_AA_SAMPLES) &&
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(sctx->framebuffer.nr_samples != SI_NUM_SMOOTH_AA_SAMPLES ||
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old_nr_samples != 1))
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sctx->msaa_sample_locs.dirty = true;
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}
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}
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@ -2205,8 +2225,10 @@ static void si_emit_msaa_sample_locs(struct r600_common_context *rctx,
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{
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struct si_context *sctx = (struct si_context *)rctx;
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struct radeon_winsys_cs *cs = sctx->b.rings.gfx.cs;
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unsigned nr_samples = sctx->framebuffer.nr_samples;
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cayman_emit_msaa_sample_locs(cs, sctx->framebuffer.nr_samples);
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cayman_emit_msaa_sample_locs(cs, nr_samples > 1 ? nr_samples :
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SI_NUM_SMOOTH_AA_SAMPLES);
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}
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const struct r600_atom si_atom_msaa_sample_locs = { si_emit_msaa_sample_locs, 18 }; /* number of CS dwords */
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@ -2217,7 +2239,8 @@ static void si_emit_msaa_config(struct r600_common_context *rctx, struct r600_at
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struct radeon_winsys_cs *cs = sctx->b.rings.gfx.cs;
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cayman_emit_msaa_config(cs, sctx->framebuffer.nr_samples,
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sctx->ps_iter_samples, 0);
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sctx->ps_iter_samples,
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sctx->smoothing_enabled ? SI_NUM_SMOOTH_AA_SAMPLES : 0);
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}
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const struct r600_atom si_atom_msaa_config = { si_emit_msaa_config, 10 }; /* number of CS dwords */
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@ -68,6 +68,8 @@ struct si_state_rasterizer {
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float offset_units;
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float offset_scale;
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bool poly_stipple_enable;
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bool line_smooth;
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bool poly_smooth;
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};
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struct si_state_dsa {
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@ -373,6 +373,11 @@ static INLINE void si_shader_selector_key(struct pipe_context *ctx,
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key->ps.export_16bpc = sctx->framebuffer.export_16bpc;
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if (rs) {
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bool is_poly = (sctx->current_rast_prim >= PIPE_PRIM_TRIANGLES &&
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sctx->current_rast_prim <= PIPE_PRIM_POLYGON) ||
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sctx->current_rast_prim >= PIPE_PRIM_TRIANGLES_ADJACENCY;
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bool is_line = !is_poly && sctx->current_rast_prim != PIPE_PRIM_POINTS;
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key->ps.color_two_side = rs->two_side;
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if (sctx->queued.named.blend) {
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@ -381,10 +386,10 @@ static INLINE void si_shader_selector_key(struct pipe_context *ctx,
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!sctx->framebuffer.cb0_is_integer;
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}
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key->ps.poly_stipple = rs->poly_stipple_enable &&
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((sctx->current_rast_prim >= PIPE_PRIM_TRIANGLES &&
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sctx->current_rast_prim <= PIPE_PRIM_POLYGON) ||
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sctx->current_rast_prim >= PIPE_PRIM_TRIANGLES_ADJACENCY);
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key->ps.poly_stipple = rs->poly_stipple_enable && is_poly;
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key->ps.poly_line_smoothing = ((is_poly && rs->poly_smooth) ||
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(is_line && rs->line_smooth)) &&
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sctx->framebuffer.nr_samples <= 1;
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}
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key->ps.alpha_func = PIPE_FUNC_ALWAYS;
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@ -921,6 +926,14 @@ void si_update_shaders(struct si_context *sctx)
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sctx->ps_db_shader_control = sctx->ps_shader->current->db_shader_control;
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sctx->db_render_state.dirty = true;
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}
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if (sctx->smoothing_enabled != sctx->ps_shader->current->key.ps.poly_line_smoothing) {
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sctx->smoothing_enabled = sctx->ps_shader->current->key.ps.poly_line_smoothing;
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sctx->msaa_config.dirty = true;
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if (sctx->b.chip_class == SI)
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sctx->db_render_state.dirty = true;
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}
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}
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void si_init_shader_functions(struct si_context *sctx)
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