mirror of
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synced 2026-05-08 02:38:04 +02:00
panfrost: Kill the old tile-buffer preload logic
Now that the gallium driver uses the pan_preload() helpers we can get rid of the code in pan_blit.c and all its dependencies. Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com> Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10033>
This commit is contained in:
parent
ff3eada7eb
commit
988b0d2863
6 changed files with 0 additions and 693 deletions
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@ -35,7 +35,6 @@ lib_FILES := \
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lib/pan_bo.h \
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lib/pan_blend.c \
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lib/pan_blend.h \
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lib/pan_blit.c \
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lib/pan_blitter.c \
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lib/pan_blitter.h \
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lib/pan_device.h \
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@ -26,7 +26,6 @@ libpanfrost_lib_files = files(
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'pan_attributes.c',
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'pan_bo.c',
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'pan_blend.c',
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'pan_blit.c',
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'pan_blitter.c',
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'pan_cs.c',
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'pan_format.c',
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@ -1,645 +0,0 @@
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/*
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* Copyright (C) 2020 Collabora, Ltd.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*
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* Authors:
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* Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
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*/
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#include <math.h>
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#include <stdio.h>
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#include "pan_encoder.h"
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#include "pan_pool.h"
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#include "pan_shader.h"
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#include "pan_scoreboard.h"
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#include "pan_texture.h"
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#include "panfrost-quirks.h"
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#include "compiler/nir/nir_builder.h"
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#include "util/u_math.h"
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/* On Midgard, the native blit infrastructure (via MFBD preloads) is broken or
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* missing in many cases. We instead use software paths as fallbacks to
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* implement blits, which are done as TILER jobs. No vertex shader is
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* necessary since we can supply screen-space coordinates directly.
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*
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* This is primarily designed as a fallback for preloads but could be extended
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* for other clears/blits if needed in the future. */
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static void
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panfrost_build_blit_shader(struct panfrost_device *dev,
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gl_frag_result loc,
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nir_alu_type T,
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bool ms,
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struct util_dynarray *binary,
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struct pan_shader_info *info)
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{
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bool is_colour = loc >= FRAG_RESULT_DATA0;
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nir_builder _b =
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nir_builder_init_simple_shader(MESA_SHADER_FRAGMENT,
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pan_shader_get_compiler_options(dev),
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"pan_blit");
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nir_builder *b = &_b;
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nir_shader *shader = b->shader;
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shader->info.internal = true;
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nir_variable *c_src = nir_variable_create(shader, nir_var_shader_in, glsl_vector_type(GLSL_TYPE_FLOAT, 2), "coord");
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nir_variable *c_out = nir_variable_create(shader, nir_var_shader_out, glsl_vector_type(
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GLSL_TYPE_FLOAT, is_colour ? 4 : 1), "out");
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c_src->data.location = VARYING_SLOT_TEX0;
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c_out->data.location = loc;
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nir_ssa_def *coord = nir_load_var(b, c_src);
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nir_tex_instr *tex = nir_tex_instr_create(shader, ms ? 3 : 1);
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tex->dest_type = T;
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if (ms) {
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tex->src[0].src_type = nir_tex_src_coord;
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tex->src[0].src = nir_src_for_ssa(nir_f2i32(b, coord));
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tex->coord_components = 2;
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tex->src[1].src_type = nir_tex_src_ms_index;
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tex->src[1].src = nir_src_for_ssa(nir_load_sample_id(b));
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tex->src[2].src_type = nir_tex_src_lod;
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tex->src[2].src = nir_src_for_ssa(nir_imm_int(b, 0));
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tex->sampler_dim = GLSL_SAMPLER_DIM_MS;
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tex->op = nir_texop_txf_ms;
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} else {
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tex->op = nir_texop_tex;
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tex->src[0].src_type = nir_tex_src_coord;
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tex->src[0].src = nir_src_for_ssa(coord);
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tex->coord_components = 2;
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tex->sampler_dim = GLSL_SAMPLER_DIM_2D;
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}
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nir_ssa_dest_init(&tex->instr, &tex->dest, 4, 32, NULL);
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nir_builder_instr_insert(b, &tex->instr);
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if (is_colour) {
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nir_store_var(b, c_out, &tex->dest.ssa, 0xFF);
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} else {
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unsigned c = loc == FRAG_RESULT_STENCIL ? 1 : 0;
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nir_store_var(b, c_out, nir_channel(b, &tex->dest.ssa, c), 0xFF);
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}
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struct panfrost_compile_inputs inputs = {
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.gpu_id = dev->gpu_id,
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.is_blit = true,
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};
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pan_shader_compile(dev, shader, &inputs, binary, info);
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ralloc_free(shader);
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}
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/* Compile and upload all possible blit shaders ahead-of-time to reduce draw
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* time overhead. There's only ~30 of them at the moment, so this is fine */
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void
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panfrost_init_blit_shaders(struct panfrost_device *dev)
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{
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static const struct {
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gl_frag_result loc;
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unsigned types;
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} shader_descs[] = {
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{ FRAG_RESULT_DEPTH, 1 << PAN_BLIT_FLOAT },
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{ FRAG_RESULT_STENCIL, 1 << PAN_BLIT_UINT },
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{ FRAG_RESULT_DATA0, ~0 },
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{ FRAG_RESULT_DATA1, ~0 },
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{ FRAG_RESULT_DATA2, ~0 },
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{ FRAG_RESULT_DATA3, ~0 },
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{ FRAG_RESULT_DATA4, ~0 },
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{ FRAG_RESULT_DATA5, ~0 },
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{ FRAG_RESULT_DATA6, ~0 },
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{ FRAG_RESULT_DATA7, ~0 }
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};
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nir_alu_type nir_types[PAN_BLIT_NUM_TYPES] = {
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nir_type_float32,
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nir_type_uint32,
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nir_type_int32
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};
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/* Total size = # of shaders * bytes per shader. There are
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* shaders for each RT (so up to DATA7 -- overestimate is
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* okay) and up to NUM_TYPES variants of each, * 2 for multisampling
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* variants. These shaders are simple enough that they should be less
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* than 8 quadwords each (again, overestimate is fine). */
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unsigned offset = 0;
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unsigned total_size = (FRAG_RESULT_DATA7 * PAN_BLIT_NUM_TYPES) * (8 * 16) * 2;
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if (pan_is_bifrost(dev))
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total_size *= 4;
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dev->blit_shaders.bo = panfrost_bo_create(dev, total_size, PAN_BO_EXECUTE);
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/* Don't bother generating multisampling variants if we don't actually
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* support multisampling */
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bool has_ms = !(dev->quirks & MIDGARD_SFBD);
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struct util_dynarray binary;
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util_dynarray_init(&binary, NULL);
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for (unsigned ms = 0; ms <= has_ms; ++ms) {
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for (unsigned i = 0; i < ARRAY_SIZE(shader_descs); ++i) {
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unsigned loc = shader_descs[i].loc;
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for (enum pan_blit_type T = 0; T < PAN_BLIT_NUM_TYPES; ++T) {
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if (!(shader_descs[i].types & (1 << T)))
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continue;
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struct pan_blit_shader *shader = &dev->blit_shaders.loads[loc][T][ms];
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struct pan_shader_info info;
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util_dynarray_clear(&binary);
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panfrost_build_blit_shader(dev, loc,
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nir_types[T], ms,
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&binary, &info);
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assert(offset + binary.size < total_size);
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memcpy(dev->blit_shaders.bo->ptr.cpu + offset,
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binary.data, binary.size);
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shader->shader = (dev->blit_shaders.bo->ptr.gpu + offset);
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if (pan_is_bifrost(dev)) {
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int rt = loc - FRAG_RESULT_DATA0;
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if (rt >= 0 && rt < 8 &&
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info.bifrost.blend[rt].return_offset) {
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shader->blend_ret_addr =
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shader->shader +
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info.bifrost.blend[rt].return_offset;
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}
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} else {
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shader->shader |= info.midgard.first_tag;
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}
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offset += ALIGN_POT(binary.size,
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pan_is_bifrost(dev) ? 128 : 64);
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}
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}
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}
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util_dynarray_fini(&binary);
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}
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static void
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panfrost_load_emit_viewport(struct pan_pool *pool, struct MALI_DRAW *draw,
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struct pan_image_view *iview)
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{
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struct panfrost_ptr t = panfrost_pool_alloc_desc(pool, VIEWPORT);
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unsigned width = u_minify(iview->image->layout.width, iview->first_level);
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unsigned height = u_minify(iview->image->layout.height, iview->first_level);
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pan_pack(t.cpu, VIEWPORT, cfg) {
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cfg.scissor_maximum_x = width - 1; /* Inclusive */
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cfg.scissor_maximum_y = height - 1;
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}
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draw->viewport = t.gpu;
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}
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static void
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panfrost_load_prepare_rsd(struct pan_pool *pool, struct MALI_RENDERER_STATE *state,
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struct pan_image_view *iview, unsigned loc)
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{
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/* Determine the sampler type needed. Stencil is always sampled as
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* UINT. Pure (U)INT is always (U)INT. Everything else is FLOAT. */
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enum pan_blit_type T =
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(loc == FRAG_RESULT_STENCIL) ? PAN_BLIT_UINT :
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(util_format_is_pure_uint(iview->format)) ? PAN_BLIT_UINT :
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(util_format_is_pure_sint(iview->format)) ? PAN_BLIT_INT :
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PAN_BLIT_FLOAT;
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bool ms = iview->image->layout.nr_samples > 1;
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const struct pan_blit_shader *shader =
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&pool->dev->blit_shaders.loads[loc][T][ms];
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state->shader.shader = shader->shader;
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assert(state->shader.shader);
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state->shader.varying_count = 1;
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state->shader.texture_count = 1;
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state->shader.sampler_count = 1;
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state->properties.stencil_from_shader = (loc == FRAG_RESULT_STENCIL);
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state->properties.depth_source = (loc == FRAG_RESULT_DEPTH) ?
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MALI_DEPTH_SOURCE_SHADER :
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MALI_DEPTH_SOURCE_FIXED_FUNCTION;
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state->multisample_misc.sample_mask = 0xFFFF;
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state->multisample_misc.multisample_enable = ms;
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state->multisample_misc.evaluate_per_sample = ms;
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state->multisample_misc.depth_write_mask = (loc == FRAG_RESULT_DEPTH);
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state->multisample_misc.depth_function = MALI_FUNC_ALWAYS;
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state->stencil_mask_misc.stencil_enable = (loc == FRAG_RESULT_STENCIL);
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state->stencil_mask_misc.stencil_mask_front = 0xFF;
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state->stencil_mask_misc.stencil_mask_back = 0xFF;
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state->stencil_front.compare_function = MALI_FUNC_ALWAYS;
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state->stencil_front.stencil_fail = MALI_STENCIL_OP_REPLACE;
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state->stencil_front.depth_fail = MALI_STENCIL_OP_REPLACE;
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state->stencil_front.depth_pass = MALI_STENCIL_OP_REPLACE;
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state->stencil_front.mask = 0xFF;
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state->stencil_back = state->stencil_front;
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}
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static void
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panfrost_load_emit_varying(struct pan_pool *pool, struct MALI_DRAW *draw,
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mali_ptr coordinates, unsigned vertex_count)
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{
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/* Bifrost needs an empty desc to mark end of prefetching */
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bool padding_buffer = pan_is_bifrost(pool->dev);
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struct panfrost_ptr varying =
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panfrost_pool_alloc_desc(pool, ATTRIBUTE);
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struct panfrost_ptr varying_buffer =
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panfrost_pool_alloc_desc_array(pool, (padding_buffer ? 2 : 1),
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ATTRIBUTE_BUFFER);
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pan_pack(varying_buffer.cpu, ATTRIBUTE_BUFFER, cfg) {
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cfg.pointer = coordinates;
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cfg.stride = 4 * sizeof(float);
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cfg.size = cfg.stride * vertex_count;
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}
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if (padding_buffer) {
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pan_pack(varying_buffer.cpu + MALI_ATTRIBUTE_BUFFER_LENGTH,
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ATTRIBUTE_BUFFER, cfg);
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}
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pan_pack(varying.cpu, ATTRIBUTE, cfg) {
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cfg.buffer_index = 0;
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cfg.offset_enable = !pan_is_bifrost(pool->dev);
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cfg.format = pool->dev->formats[PIPE_FORMAT_R32G32_FLOAT].hw;
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}
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draw->varyings = varying.gpu;
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draw->varying_buffers = varying_buffer.gpu;
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draw->position = coordinates;
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}
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static void
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midgard_load_emit_texture(struct pan_pool *pool, struct MALI_DRAW *draw,
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struct pan_image_view *iview)
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{
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struct panfrost_ptr texture =
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panfrost_pool_alloc_desc_aggregate(pool,
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PAN_DESC(MIDGARD_TEXTURE),
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PAN_DESC_ARRAY(iview->image->layout.nr_samples,
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SURFACE_WITH_STRIDE));
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struct panfrost_ptr payload = {
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texture.cpu + MALI_MIDGARD_TEXTURE_LENGTH,
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texture.gpu + MALI_MIDGARD_TEXTURE_LENGTH,
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};
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struct panfrost_ptr sampler =
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panfrost_pool_alloc_desc(pool, MIDGARD_SAMPLER);
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panfrost_new_texture(pool->dev, iview, texture.cpu, &payload);
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pan_pack(sampler.cpu, MIDGARD_SAMPLER, cfg)
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cfg.normalized_coordinates = false;
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draw->textures = panfrost_pool_upload(pool, &texture.gpu, sizeof(texture.gpu));
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draw->samplers = sampler.gpu;
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}
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static void
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midgard_load_emit_blend_rt(struct pan_pool *pool, void *out,
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mali_ptr blend_shader, struct pan_image_view *iview,
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unsigned rt, unsigned loc)
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{
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bool disabled = loc != (FRAG_RESULT_DATA0 + rt);
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bool srgb = util_format_is_srgb(iview->format);
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pan_pack(out, BLEND, cfg) {
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if (disabled) {
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cfg.midgard.equation.color_mask = 0xf;
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cfg.midgard.equation.rgb.a = MALI_BLEND_OPERAND_A_SRC;
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cfg.midgard.equation.rgb.b = MALI_BLEND_OPERAND_B_SRC;
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cfg.midgard.equation.rgb.c = MALI_BLEND_OPERAND_C_ZERO;
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cfg.midgard.equation.alpha.a = MALI_BLEND_OPERAND_A_SRC;
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cfg.midgard.equation.alpha.b = MALI_BLEND_OPERAND_B_SRC;
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cfg.midgard.equation.alpha.c = MALI_BLEND_OPERAND_C_ZERO;
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continue;
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}
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cfg.round_to_fb_precision = true;
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cfg.srgb = srgb;
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if (!blend_shader) {
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cfg.midgard.equation.rgb.a = MALI_BLEND_OPERAND_A_SRC;
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cfg.midgard.equation.rgb.b = MALI_BLEND_OPERAND_B_SRC;
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cfg.midgard.equation.rgb.c = MALI_BLEND_OPERAND_C_ZERO;
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cfg.midgard.equation.alpha.a = MALI_BLEND_OPERAND_A_SRC;
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cfg.midgard.equation.alpha.b = MALI_BLEND_OPERAND_B_SRC;
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cfg.midgard.equation.alpha.c = MALI_BLEND_OPERAND_C_ZERO;
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cfg.midgard.equation.color_mask = 0xf;
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} else {
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cfg.midgard.blend_shader = true;
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cfg.midgard.shader_pc = blend_shader;
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}
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}
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}
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static void
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midgard_load_emit_rsd(struct pan_pool *pool, struct MALI_DRAW *draw,
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mali_ptr blend_shader, struct pan_image_view *iview,
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unsigned loc)
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{
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struct panfrost_ptr t =
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panfrost_pool_alloc_desc_aggregate(pool,
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PAN_DESC(RENDERER_STATE),
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PAN_DESC_ARRAY(8, BLEND));
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bool srgb = util_format_is_srgb(iview->format);
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pan_pack(t.cpu, RENDERER_STATE, cfg) {
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panfrost_load_prepare_rsd(pool, &cfg, iview, loc);
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cfg.properties.midgard.work_register_count = 4;
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cfg.properties.midgard.force_early_z = (loc >= FRAG_RESULT_DATA0);
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cfg.stencil_mask_misc.alpha_test_compare_function = MALI_FUNC_ALWAYS;
|
||||
if (!(pool->dev->quirks & MIDGARD_SFBD)) {
|
||||
cfg.sfbd_blend_shader = blend_shader;
|
||||
continue;
|
||||
}
|
||||
|
||||
cfg.stencil_mask_misc.sfbd_write_enable = true;
|
||||
cfg.stencil_mask_misc.sfbd_dither_disable = true;
|
||||
cfg.stencil_mask_misc.sfbd_srgb = srgb;
|
||||
cfg.multisample_misc.sfbd_blend_shader = !!blend_shader;
|
||||
if (cfg.multisample_misc.sfbd_blend_shader) {
|
||||
cfg.sfbd_blend_shader = blend_shader;
|
||||
continue;
|
||||
}
|
||||
|
||||
cfg.sfbd_blend_equation.rgb.a = MALI_BLEND_OPERAND_A_SRC;
|
||||
cfg.sfbd_blend_equation.rgb.b = MALI_BLEND_OPERAND_B_SRC;
|
||||
cfg.sfbd_blend_equation.rgb.c = MALI_BLEND_OPERAND_C_ZERO;
|
||||
cfg.sfbd_blend_equation.alpha.a = MALI_BLEND_OPERAND_A_SRC;
|
||||
cfg.sfbd_blend_equation.alpha.b = MALI_BLEND_OPERAND_B_SRC;
|
||||
cfg.sfbd_blend_equation.alpha.c = MALI_BLEND_OPERAND_C_ZERO;
|
||||
cfg.sfbd_blend_constant = 0;
|
||||
|
||||
if (loc >= FRAG_RESULT_DATA0)
|
||||
cfg.sfbd_blend_equation.color_mask = 0xf;
|
||||
}
|
||||
|
||||
for (unsigned i = 0; i < 8; ++i) {
|
||||
void *dest = t.cpu + MALI_RENDERER_STATE_LENGTH + MALI_BLEND_LENGTH * i;
|
||||
|
||||
midgard_load_emit_blend_rt(pool, dest, blend_shader, iview, i, loc);
|
||||
}
|
||||
|
||||
draw->state = t.gpu;
|
||||
}
|
||||
|
||||
/* Add a shader-based load on Midgard (draw-time for GL). Shaders are
|
||||
* precached */
|
||||
|
||||
void
|
||||
panfrost_load_midg(struct pan_pool *pool,
|
||||
struct pan_scoreboard *scoreboard,
|
||||
mali_ptr blend_shader,
|
||||
mali_ptr fbd,
|
||||
mali_ptr coordinates, unsigned vertex_count,
|
||||
struct pan_image_view *iview,
|
||||
unsigned loc)
|
||||
{
|
||||
struct panfrost_ptr t =
|
||||
panfrost_pool_alloc_desc(pool, MIDGARD_TILER_JOB);
|
||||
|
||||
pan_section_pack(t.cpu, MIDGARD_TILER_JOB, DRAW, cfg) {
|
||||
cfg.texture_descriptor_is_64b = true;
|
||||
cfg.draw_descriptor_is_64b = true;
|
||||
cfg.four_components_per_vertex = true;
|
||||
|
||||
panfrost_load_emit_varying(pool, &cfg, coordinates, vertex_count);
|
||||
midgard_load_emit_texture(pool, &cfg, iview);
|
||||
panfrost_load_emit_viewport(pool, &cfg, iview);
|
||||
cfg.fbd = fbd;
|
||||
midgard_load_emit_rsd(pool, &cfg, blend_shader, iview, loc);
|
||||
}
|
||||
|
||||
pan_section_pack(t.cpu, MIDGARD_TILER_JOB, PRIMITIVE, cfg) {
|
||||
cfg.draw_mode = MALI_DRAW_MODE_TRIANGLES;
|
||||
cfg.index_count = vertex_count;
|
||||
cfg.job_task_split = 6;
|
||||
}
|
||||
|
||||
pan_section_pack(t.cpu, MIDGARD_TILER_JOB, PRIMITIVE_SIZE, cfg) {
|
||||
cfg.constant = 1.0f;
|
||||
}
|
||||
|
||||
panfrost_pack_work_groups_compute(pan_section_ptr(t.cpu,
|
||||
MIDGARD_TILER_JOB,
|
||||
INVOCATION),
|
||||
1, vertex_count, 1, 1, 1, 1, true);
|
||||
|
||||
panfrost_add_job(pool, scoreboard, MALI_JOB_TYPE_TILER, false, false,
|
||||
0, 0, &t, true);
|
||||
}
|
||||
|
||||
static void
|
||||
bifrost_load_emit_texture(struct pan_pool *pool, struct MALI_DRAW *draw,
|
||||
struct pan_image_view *iview)
|
||||
{
|
||||
struct panfrost_ptr texture =
|
||||
panfrost_pool_alloc_desc_aggregate(pool,
|
||||
PAN_DESC(BIFROST_TEXTURE),
|
||||
PAN_DESC_ARRAY(iview->image->layout.nr_samples,
|
||||
SURFACE_WITH_STRIDE));
|
||||
struct panfrost_ptr sampler =
|
||||
panfrost_pool_alloc_desc(pool, BIFROST_SAMPLER);
|
||||
struct panfrost_ptr payload = {
|
||||
.cpu = texture.cpu + MALI_BIFROST_TEXTURE_LENGTH,
|
||||
.gpu = texture.gpu + MALI_BIFROST_TEXTURE_LENGTH,
|
||||
};
|
||||
|
||||
panfrost_new_texture(pool->dev, iview, texture.cpu, &payload);
|
||||
|
||||
pan_pack(sampler.cpu, BIFROST_SAMPLER, cfg) {
|
||||
cfg.seamless_cube_map = false;
|
||||
cfg.normalized_coordinates = false;
|
||||
cfg.point_sample_minify = true;
|
||||
cfg.point_sample_magnify = true;
|
||||
}
|
||||
|
||||
draw->textures = texture.gpu;
|
||||
draw->samplers = sampler.gpu;
|
||||
}
|
||||
|
||||
static enum mali_bifrost_register_file_format
|
||||
blit_type_to_reg_fmt(enum pan_blit_type btype)
|
||||
{
|
||||
switch (btype) {
|
||||
case PAN_BLIT_FLOAT:
|
||||
return MALI_BIFROST_REGISTER_FILE_FORMAT_F32;
|
||||
case PAN_BLIT_INT:
|
||||
return MALI_BIFROST_REGISTER_FILE_FORMAT_I32;
|
||||
case PAN_BLIT_UINT:
|
||||
return MALI_BIFROST_REGISTER_FILE_FORMAT_U32;
|
||||
default:
|
||||
unreachable("Invalid blit type");
|
||||
}
|
||||
}
|
||||
|
||||
static void
|
||||
bifrost_load_emit_blend_rt(struct pan_pool *pool, void *out,
|
||||
mali_ptr blend_shader, struct pan_image_view *iview,
|
||||
unsigned rt, unsigned loc)
|
||||
{
|
||||
enum pan_blit_type T =
|
||||
(loc == FRAG_RESULT_STENCIL) ? PAN_BLIT_UINT :
|
||||
(util_format_is_pure_uint(iview->format)) ? PAN_BLIT_UINT :
|
||||
(util_format_is_pure_sint(iview->format)) ? PAN_BLIT_INT :
|
||||
PAN_BLIT_FLOAT;
|
||||
bool disabled = loc != (FRAG_RESULT_DATA0 + rt);
|
||||
bool srgb = util_format_is_srgb(iview->format);
|
||||
|
||||
pan_pack(out, BLEND, cfg) {
|
||||
if (disabled) {
|
||||
cfg.enable = false;
|
||||
cfg.bifrost.internal.mode = MALI_BIFROST_BLEND_MODE_OFF;
|
||||
continue;
|
||||
}
|
||||
|
||||
cfg.round_to_fb_precision = true;
|
||||
cfg.srgb = srgb;
|
||||
cfg.bifrost.internal.mode = blend_shader ?
|
||||
MALI_BIFROST_BLEND_MODE_SHADER :
|
||||
MALI_BIFROST_BLEND_MODE_OPAQUE;
|
||||
if (blend_shader) {
|
||||
cfg.bifrost.internal.shader.pc = blend_shader;
|
||||
} else {
|
||||
const struct util_format_description *format_desc =
|
||||
util_format_description(iview->format);
|
||||
|
||||
cfg.bifrost.equation.rgb.a = MALI_BLEND_OPERAND_A_SRC;
|
||||
cfg.bifrost.equation.rgb.b = MALI_BLEND_OPERAND_B_SRC;
|
||||
cfg.bifrost.equation.rgb.c = MALI_BLEND_OPERAND_C_ZERO;
|
||||
cfg.bifrost.equation.alpha.a = MALI_BLEND_OPERAND_A_SRC;
|
||||
cfg.bifrost.equation.alpha.b = MALI_BLEND_OPERAND_B_SRC;
|
||||
cfg.bifrost.equation.alpha.c = MALI_BLEND_OPERAND_C_ZERO;
|
||||
cfg.bifrost.equation.color_mask = 0xf;
|
||||
cfg.bifrost.internal.fixed_function.num_comps = 4;
|
||||
cfg.bifrost.internal.fixed_function.conversion.memory_format =
|
||||
panfrost_format_to_bifrost_blend(pool->dev, format_desc, true);
|
||||
cfg.bifrost.internal.fixed_function.conversion.register_format =
|
||||
blit_type_to_reg_fmt(T);
|
||||
|
||||
cfg.bifrost.internal.fixed_function.rt = rt;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
static void
|
||||
bifrost_load_emit_rsd(struct pan_pool *pool, struct MALI_DRAW *draw,
|
||||
mali_ptr blend_shader, struct pan_image_view *iview,
|
||||
unsigned loc)
|
||||
{
|
||||
struct panfrost_ptr t =
|
||||
panfrost_pool_alloc_desc_aggregate(pool,
|
||||
PAN_DESC(RENDERER_STATE),
|
||||
PAN_DESC_ARRAY(8, BLEND));
|
||||
|
||||
pan_pack(t.cpu, RENDERER_STATE, cfg) {
|
||||
panfrost_load_prepare_rsd(pool, &cfg, iview, loc);
|
||||
if (loc >= FRAG_RESULT_DATA0) {
|
||||
cfg.properties.bifrost.zs_update_operation =
|
||||
MALI_PIXEL_KILL_STRONG_EARLY;
|
||||
cfg.properties.bifrost.pixel_kill_operation =
|
||||
MALI_PIXEL_KILL_FORCE_EARLY;
|
||||
} else {
|
||||
cfg.properties.bifrost.zs_update_operation =
|
||||
MALI_PIXEL_KILL_FORCE_LATE;
|
||||
cfg.properties.bifrost.pixel_kill_operation =
|
||||
MALI_PIXEL_KILL_FORCE_LATE;
|
||||
}
|
||||
cfg.properties.bifrost.allow_forward_pixel_to_kill = true;
|
||||
cfg.preload.fragment.coverage = true;
|
||||
cfg.preload.fragment.sample_mask_id = iview->image->layout.nr_samples > 1;
|
||||
}
|
||||
|
||||
for (unsigned i = 0; i < 8; ++i) {
|
||||
void *dest = t.cpu + MALI_RENDERER_STATE_LENGTH + MALI_BLEND_LENGTH * i;
|
||||
|
||||
bifrost_load_emit_blend_rt(pool, dest, blend_shader, iview, i, loc);
|
||||
}
|
||||
|
||||
draw->state = t.gpu;
|
||||
}
|
||||
|
||||
void
|
||||
panfrost_load_bifrost(struct pan_pool *pool,
|
||||
struct pan_scoreboard *scoreboard,
|
||||
mali_ptr blend_shader,
|
||||
mali_ptr thread_storage,
|
||||
mali_ptr tiler,
|
||||
mali_ptr coordinates, unsigned vertex_count,
|
||||
struct pan_image_view *iview,
|
||||
unsigned loc)
|
||||
{
|
||||
struct panfrost_ptr t =
|
||||
panfrost_pool_alloc_desc(pool, BIFROST_TILER_JOB);
|
||||
|
||||
pan_section_pack(t.cpu, BIFROST_TILER_JOB, DRAW, cfg) {
|
||||
cfg.four_components_per_vertex = true;
|
||||
cfg.draw_descriptor_is_64b = true;
|
||||
|
||||
panfrost_load_emit_varying(pool, &cfg, coordinates, vertex_count);
|
||||
bifrost_load_emit_texture(pool, &cfg, iview);
|
||||
panfrost_load_emit_viewport(pool, &cfg, iview);
|
||||
cfg.thread_storage = thread_storage;
|
||||
bifrost_load_emit_rsd(pool, &cfg, blend_shader, iview, loc);
|
||||
}
|
||||
|
||||
pan_section_pack(t.cpu, BIFROST_TILER_JOB, PRIMITIVE, cfg) {
|
||||
cfg.draw_mode = MALI_DRAW_MODE_TRIANGLES;
|
||||
cfg.index_count = vertex_count;
|
||||
cfg.job_task_split = 6;
|
||||
}
|
||||
|
||||
pan_section_pack(t.cpu, BIFROST_TILER_JOB, PRIMITIVE_SIZE, cfg) {
|
||||
cfg.constant = 1.0f;
|
||||
}
|
||||
|
||||
panfrost_pack_work_groups_compute(pan_section_ptr(t.cpu,
|
||||
MIDGARD_TILER_JOB,
|
||||
INVOCATION),
|
||||
1, vertex_count, 1, 1, 1, 1, true);
|
||||
|
||||
pan_section_pack(t.cpu, BIFROST_TILER_JOB, PADDING, cfg) { }
|
||||
pan_section_pack(t.cpu, BIFROST_TILER_JOB, TILER, cfg) {
|
||||
cfg.address = tiler;
|
||||
}
|
||||
|
||||
panfrost_add_job(pool, scoreboard, MALI_JOB_TYPE_TILER, false, false,
|
||||
0, 0, &t, true);
|
||||
}
|
||||
|
|
@ -71,27 +71,6 @@
|
|||
/* Fencepost problem, hence the off-by-one */
|
||||
#define NR_BO_CACHE_BUCKETS (MAX_BO_CACHE_BUCKET - MIN_BO_CACHE_BUCKET + 1)
|
||||
|
||||
/* Cache for blit shaders. Defined here so they can be cached with the device */
|
||||
|
||||
enum pan_blit_type {
|
||||
PAN_BLIT_FLOAT = 0,
|
||||
PAN_BLIT_UINT,
|
||||
PAN_BLIT_INT,
|
||||
PAN_BLIT_NUM_TYPES,
|
||||
};
|
||||
|
||||
#define PAN_BLIT_NUM_TARGETS (12)
|
||||
|
||||
struct pan_blit_shader {
|
||||
mali_ptr shader;
|
||||
uint32_t blend_ret_addr;
|
||||
};
|
||||
|
||||
struct pan_blit_shaders {
|
||||
struct panfrost_bo *bo;
|
||||
struct pan_blit_shader loads[PAN_BLIT_NUM_TARGETS][PAN_BLIT_NUM_TYPES][2];
|
||||
};
|
||||
|
||||
struct pan_blitter {
|
||||
struct {
|
||||
struct pan_pool pool;
|
||||
|
|
@ -213,7 +192,6 @@ struct panfrost_device {
|
|||
struct list_head buckets[NR_BO_CACHE_BUCKETS];
|
||||
} bo_cache;
|
||||
|
||||
struct pan_blit_shaders blit_shaders;
|
||||
struct pan_blitter blitter;
|
||||
struct pan_blend_shaders blend_shaders;
|
||||
struct pan_indirect_draw_shaders indirect_draw_shaders;
|
||||
|
|
|
|||
|
|
@ -270,7 +270,6 @@ void
|
|||
panfrost_close_device(struct panfrost_device *dev)
|
||||
{
|
||||
pthread_mutex_destroy(&dev->submit_lock);
|
||||
panfrost_bo_unreference(dev->blit_shaders.bo);
|
||||
panfrost_bo_unreference(dev->tiler_heap);
|
||||
panfrost_bo_cache_evict_all(dev);
|
||||
pthread_mutex_destroy(&dev->bo_cache.lock);
|
||||
|
|
|
|||
|
|
@ -258,29 +258,6 @@ panfrost_format_to_bifrost_blend(const struct panfrost_device *dev,
|
|||
struct pan_pool;
|
||||
struct pan_scoreboard;
|
||||
|
||||
void
|
||||
panfrost_init_blit_shaders(struct panfrost_device *dev);
|
||||
|
||||
void
|
||||
panfrost_load_midg(
|
||||
struct pan_pool *pool,
|
||||
struct pan_scoreboard *scoreboard,
|
||||
mali_ptr blend_shader,
|
||||
mali_ptr fbd,
|
||||
mali_ptr coordinates, unsigned vertex_count,
|
||||
struct pan_image_view *iview,
|
||||
unsigned loc);
|
||||
|
||||
void
|
||||
panfrost_load_bifrost(struct pan_pool *pool,
|
||||
struct pan_scoreboard *scoreboard,
|
||||
mali_ptr blend_shader,
|
||||
mali_ptr thread_storage,
|
||||
mali_ptr tiler,
|
||||
mali_ptr coordinates, unsigned vertex_count,
|
||||
struct pan_image_view *iview,
|
||||
unsigned loc);
|
||||
|
||||
/* DRM modifier helper */
|
||||
|
||||
#define drm_is_afbc(mod) \
|
||||
|
|
|
|||
Loading…
Add table
Reference in a new issue