diff --git a/src/amd/vulkan/radv_meta_clear.c b/src/amd/vulkan/radv_meta_clear.c index 75dbf8eecb9..4b5ae522846 100644 --- a/src/amd/vulkan/radv_meta_clear.c +++ b/src/amd/vulkan/radv_meta_clear.c @@ -2229,11 +2229,6 @@ radv_cmd_clear_image(struct radv_cmd_buffer *cmd_buffer, internal_clear_value.color.uint32[0] = (r << 4) | (g & 0xf); } - if (format == VK_FORMAT_R32G32B32_UINT || - format == VK_FORMAT_R32G32B32_SINT || - format == VK_FORMAT_R32G32B32_SFLOAT) - cs = true; - for (uint32_t r = 0; r < range_count; r++) { const VkImageSubresourceRange *range = &ranges[r]; @@ -2282,7 +2277,12 @@ void radv_CmdClearColorImage( RADV_FROM_HANDLE(radv_cmd_buffer, cmd_buffer, commandBuffer); RADV_FROM_HANDLE(radv_image, image, image_h); struct radv_meta_saved_state saved_state; - bool cs = cmd_buffer->queue_family_index == RADV_QUEUE_COMPUTE; + bool cs; + + cs = cmd_buffer->queue_family_index == RADV_QUEUE_COMPUTE || + image->vk_format == VK_FORMAT_R32G32B32_UINT || + image->vk_format == VK_FORMAT_R32G32B32_SINT || + image->vk_format == VK_FORMAT_R32G32B32_SFLOAT; if (cs) { radv_meta_save(&saved_state, cmd_buffer, diff --git a/src/amd/vulkan/radv_meta_copy.c b/src/amd/vulkan/radv_meta_copy.c index 3ada978d651..fc79a734337 100644 --- a/src/amd/vulkan/radv_meta_copy.c +++ b/src/amd/vulkan/radv_meta_copy.c @@ -127,15 +127,18 @@ copy_buffer_to_image(struct radv_cmd_buffer *cmd_buffer, VkImageLayout layout, const VkBufferImageCopy2KHR* region) { - bool cs = cmd_buffer->queue_family_index == RADV_QUEUE_COMPUTE; struct radv_meta_saved_state saved_state; bool old_predicating; + bool cs; /* The Vulkan 1.0 spec says "dstImage must have a sample count equal to * VK_SAMPLE_COUNT_1_BIT." */ assert(image->info.samples == 1); + cs = cmd_buffer->queue_family_index == RADV_QUEUE_COMPUTE || + !image_is_renderable(cmd_buffer->device, image); + radv_meta_save(&saved_state, cmd_buffer, (cs ? RADV_META_SAVE_COMPUTE_PIPELINE : RADV_META_SAVE_GRAPHICS_PIPELINE) | @@ -224,8 +227,7 @@ copy_buffer_to_image(struct radv_cmd_buffer *cmd_buffer, /* Perform Blit */ - if (cs || - !image_is_renderable(cmd_buffer->device, img_bsurf.image)) { + if (cs) { radv_meta_buffer_to_image_cs(cmd_buffer, &buf_bsurf, &img_bsurf, 1, &rect); } else { radv_meta_blit2d(cmd_buffer, NULL, &buf_bsurf, &img_bsurf, 1, &rect); @@ -459,9 +461,9 @@ copy_image(struct radv_cmd_buffer *cmd_buffer, VkImageLayout dst_image_layout, const VkImageCopy2KHR *region) { - bool cs = cmd_buffer->queue_family_index == RADV_QUEUE_COMPUTE; struct radv_meta_saved_state saved_state; bool old_predicating; + bool cs; /* From the Vulkan 1.0 spec: * @@ -470,6 +472,9 @@ copy_image(struct radv_cmd_buffer *cmd_buffer, */ assert(src_image->info.samples == dst_image->info.samples); + cs = cmd_buffer->queue_family_index == RADV_QUEUE_COMPUTE || + !image_is_renderable(cmd_buffer->device, dst_image); + radv_meta_save(&saved_state, cmd_buffer, (cs ? RADV_META_SAVE_COMPUTE_PIPELINE : RADV_META_SAVE_GRAPHICS_PIPELINE) | @@ -582,8 +587,7 @@ copy_image(struct radv_cmd_buffer *cmd_buffer, rect.src_y = src_offset_el.y; /* Perform Blit */ - if (cs || - !image_is_renderable(cmd_buffer->device, b_dst.image)) { + if (cs) { radv_meta_image_to_image_cs(cmd_buffer, &b_src, &b_dst, 1, &rect); } else { radv_meta_blit2d(cmd_buffer, &b_src, NULL, &b_dst, 1, &rect);