fdo-mirrors/mesa
1
0
Fork 0
mirror of https://gitlab.freedesktop.org/mesa/mesa.git synced 2026-05-09 06:48:06 +02:00
Code Issues Projects Releases Packages Wiki Activity Actions 1

r300: always transform sin/cos input for fs

Browse source 
We don't need to check anymore if this was already applied and it turned
out the check was not working properly in the first place.

The check for vs is kept in place, because that one still detects that
few wine shaders already have the sin/cos input in correct range.

Signed-off-by: Pavel Ondračka <pavel.ondracka@gmail.com>
Reviewed-by: Filip Gawin <filip@gawin.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32160>
This commit is contained in:
Pavel Ondračka 2024-11-15 17:27:31 +01:00 • committed by Marge Bot
parent ec1a00f507
commit 9838024547
2 changed files with 2 additions and 22 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

20
src/gallium/drivers/r300/compiler/r300_nir.h
View file

@ -129,26 +129,6 @@ needs_vs_trig_input_fixup(UNUSED struct hash_table *ht, const nir_alu_instr *ins
return false;
}
static inline bool
needs_fs_trig_input_fixup(UNUSED struct hash_table *ht, const nir_alu_instr *instr, unsigned src,
unsigned num_components, const uint8_t *swizzle)
{
/* We are checking for ffract(a * (1 / 2 * pi)) pattern. */
nir_instr *parent = instr->src[src].src.ssa->parent_instr;
if (parent->type != nir_instr_type_alu)
return true;
nir_alu_instr *fract = nir_instr_as_alu(parent);
if (fract->op != nir_op_ffract)
return true;
parent = fract->src[0].src.ssa->parent_instr;
/* Now check for fmul(a, 1 / (2 * pi)). */
if (!check_instr_and_src_value(nir_op_fmul, &parent, 0.1591549))
return true;
return false;
}
bool r300_is_only_used_as_float(const nir_alu_instr *instr);
char *r300_finalize_nir(struct pipe_screen *pscreen, struct nir_shader *nir);

4
src/gallium/drivers/r300/compiler/r300_nir_algebraic.py
View file

@ -27,8 +27,8 @@ transform_trig_input_vs_r500 = [
# y = frac(x / 2PI)
#
transform_trig_input_fs_r500 = [
(('fsin', 'a(needs_fs_trig_input_fixup)'), ('fsin', ('ffract', ('fmul', 'a', 1 / (2 * pi))))),
(('fcos', 'a(needs_fs_trig_input_fixup)'), ('fcos', ('ffract', ('fmul', 'a', 1 / (2 * pi))))),
(('fsin', 'a'), ('fsin', ('ffract', ('fmul', 'a', 1 / (2 * pi))))),
(('fcos', 'a'), ('fcos', ('ffract', ('fmul', 'a', 1 / (2 * pi))))),
]
# The is a pattern produced by wined3d for A0 register load.