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i965/fs: Remove manual unrolling of BFI instructions from the generator.
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
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1 changed files with 2 additions and 34 deletions
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@ -1841,44 +1841,12 @@ fs_generator::generate_code(const cfg_t *cfg, int dispatch_width)
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case BRW_OPCODE_BFI1:
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assert(devinfo->gen >= 7);
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/* The Haswell WaForceSIMD8ForBFIInstruction workaround says that we
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* should
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*
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* "Force BFI instructions to be executed always in SIMD8."
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*/
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if (dispatch_width == 16 && devinfo->is_haswell) {
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brw_set_default_exec_size(p, BRW_EXECUTE_8);
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brw_set_default_compression_control(p, BRW_COMPRESSION_NONE);
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brw_BFI1(p, firsthalf(dst), firsthalf(src[0]), firsthalf(src[1]));
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brw_set_default_compression_control(p, BRW_COMPRESSION_2NDHALF);
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brw_BFI1(p, sechalf(dst), sechalf(src[0]), sechalf(src[1]));
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brw_set_default_compression_control(p, BRW_COMPRESSION_COMPRESSED);
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} else {
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brw_BFI1(p, dst, src[0], src[1]);
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}
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brw_BFI1(p, dst, src[0], src[1]);
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break;
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case BRW_OPCODE_BFI2:
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assert(devinfo->gen >= 7);
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brw_set_default_access_mode(p, BRW_ALIGN_16);
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/* The Haswell WaForceSIMD8ForBFIInstruction workaround says that we
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* should
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*
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* "Force BFI instructions to be executed always in SIMD8."
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*
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* Otherwise we would be able to emit compressed instructions like we
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* do for the other three-source instructions.
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*/
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if (dispatch_width == 16 && devinfo->is_haswell) {
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brw_set_default_exec_size(p, BRW_EXECUTE_8);
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brw_set_default_compression_control(p, BRW_COMPRESSION_NONE);
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brw_BFI2(p, firsthalf(dst), firsthalf(src[0]), firsthalf(src[1]), firsthalf(src[2]));
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brw_set_default_compression_control(p, BRW_COMPRESSION_2NDHALF);
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brw_BFI2(p, sechalf(dst), sechalf(src[0]), sechalf(src[1]), sechalf(src[2]));
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brw_set_default_compression_control(p, BRW_COMPRESSION_COMPRESSED);
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} else {
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brw_BFI2(p, dst, src[0], src[1], src[2]);
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}
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brw_set_default_access_mode(p, BRW_ALIGN_1);
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brw_BFI2(p, dst, src[0], src[1], src[2]);
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break;
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case BRW_OPCODE_IF:
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