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radv/amdgpu: Remove command submission with scheduled dependencies.
These are no longer used by any part of RADV, so we can just safely delete it. Signed-off-by: Timur Kristóf <timur.kristof@gmail.com> Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20010>
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parent
7cb128ffb1
commit
97d3377b56
3 changed files with 7 additions and 48 deletions
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@ -5579,7 +5579,7 @@ radv_queue_submit_empty(struct radv_queue *queue, struct vk_queue_submit *submis
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.queue_index = queue->vk.index_in_family,
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};
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return queue->device->ws->cs_submit(ctx, 1, &submit, submission->wait_count, submission->waits,
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return queue->device->ws->cs_submit(ctx, &submit, submission->wait_count, submission->waits,
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submission->signal_count, submission->signals, false);
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}
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@ -5711,7 +5711,7 @@ radv_queue_submit_normal(struct radv_queue *queue, struct vk_queue_submit *submi
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submit.preamble_count = submit_ace ? 4 : 1;
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result = queue->device->ws->cs_submit(
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ctx, 1, &submit, j == 0 ? submission->wait_count : 0, submission->waits,
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ctx, &submit, j == 0 ? submission->wait_count : 0, submission->waits,
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last_submit ? submission->signal_count : 0, submission->signals, can_patch);
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if (result != VK_SUCCESS)
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@ -5781,7 +5781,7 @@ radv_queue_internal_submit(struct radv_queue *queue, struct radeon_cmdbuf *cs)
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.cs_count = 1,
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};
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VkResult result = queue->device->ws->cs_submit(ctx, 1, &submit, 0, NULL, 0, NULL, false);
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VkResult result = queue->device->ws->cs_submit(ctx, &submit, 0, NULL, 0, NULL, false);
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if (result != VK_SUCCESS)
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return false;
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@ -283,7 +283,7 @@ struct radeon_winsys {
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void (*cs_grow)(struct radeon_cmdbuf *cs, size_t min_size);
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VkResult (*cs_submit)(struct radeon_winsys_ctx *ctx, uint32_t submit_count,
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VkResult (*cs_submit)(struct radeon_winsys_ctx *ctx,
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const struct radv_winsys_submit_info *submits, uint32_t wait_count,
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const struct vk_sync_wait *waits, uint32_t signal_count,
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const struct vk_sync_signal *signals, bool can_patch);
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@ -104,11 +104,6 @@ struct radv_winsys_sem_info {
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bool cs_emit_wait;
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struct radv_winsys_sem_counts wait;
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struct radv_winsys_sem_counts signal;
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/* Expresses a scheduled dependency, meaning that the sumbission of the
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* referenced fence must be scheduled before the current submission.
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*/
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struct radv_amdgpu_fence *scheduled_dependency;
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};
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static uint32_t radv_amdgpu_ctx_queue_syncobj(struct radv_amdgpu_ctx *ctx, unsigned ip,
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@ -1375,7 +1370,7 @@ radv_amdgpu_winsys_cs_submit_internal(struct radv_amdgpu_ctx *ctx,
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}
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static VkResult
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radv_amdgpu_winsys_cs_submit(struct radeon_winsys_ctx *_ctx, uint32_t submit_count,
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radv_amdgpu_winsys_cs_submit(struct radeon_winsys_ctx *_ctx,
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const struct radv_winsys_submit_info *submits, uint32_t wait_count,
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const struct vk_sync_wait *waits, uint32_t signal_count,
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const struct vk_sync_signal *signals, bool can_patch)
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@ -1442,33 +1437,7 @@ radv_amdgpu_winsys_cs_submit(struct radeon_winsys_ctx *_ctx, uint32_t submit_cou
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.cs_emit_signal = true,
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};
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/* Should submit to at least 1 queue. */
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assert(submit_count);
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if (submit_count == 1) {
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result = radv_amdgpu_winsys_cs_submit_internal(ctx, &submits[0], &sem_info, can_patch);
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} else {
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/* Multiple queue submissions without gang submit.
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* This code path will submit each item separately and add the
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* previous submission as a scheduled dependency to the next one.
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*/
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assert(ws->info.has_scheduled_fence_dependency);
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struct radv_amdgpu_fence *next_dependency = NULL;
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for (unsigned i = 0; i < submit_count; ++i) {
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sem_info.scheduled_dependency = next_dependency;
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sem_info.cs_emit_wait = i == 0;
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sem_info.cs_emit_signal = i == submit_count - 1;
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result = radv_amdgpu_winsys_cs_submit_internal(ctx, &submits[i], &sem_info, can_patch);
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if (result != VK_SUCCESS)
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goto out;
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next_dependency = &ctx->last_submission[submits[i].ip_type][submits[i].queue_index];
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}
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}
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result = radv_amdgpu_winsys_cs_submit_internal(ctx, &submits[0], &sem_info, can_patch);
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out:
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STACK_ARRAY_FINISH(wait_points);
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@ -1740,7 +1709,6 @@ radv_amdgpu_cs_submit(struct radv_amdgpu_ctx *ctx, struct radv_amdgpu_cs_request
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int size;
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struct drm_amdgpu_cs_chunk *chunks;
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struct drm_amdgpu_cs_chunk_data *chunk_data;
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struct drm_amdgpu_cs_chunk_dep chunk_dep;
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bool use_bo_list_create = ctx->ws->info.drm_minor < 27;
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struct drm_amdgpu_bo_list_in bo_list_in;
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void *wait_syncobj = NULL, *signal_syncobj = NULL;
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@ -1754,8 +1722,7 @@ radv_amdgpu_cs_submit(struct radv_amdgpu_ctx *ctx, struct radv_amdgpu_cs_request
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if (!queue_syncobj)
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return VK_ERROR_OUT_OF_HOST_MEMORY;
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size = request->number_of_ibs + 1 + (has_user_fence ? 1 : 0) + (!use_bo_list_create ? 1 : 0) +
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3 + !!sem_info->scheduled_dependency;
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size = request->number_of_ibs + 1 + (has_user_fence ? 1 : 0) + (!use_bo_list_create ? 1 : 0) + 3;
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chunks = malloc(sizeof(chunks[0]) * size);
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if (!chunks)
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@ -1801,14 +1768,6 @@ radv_amdgpu_cs_submit(struct radv_amdgpu_ctx *ctx, struct radv_amdgpu_cs_request
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amdgpu_cs_chunk_fence_info_to_data(&fence_info, &chunk_data[i]);
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}
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if (sem_info->scheduled_dependency) {
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amdgpu_cs_chunk_fence_to_dep(&sem_info->scheduled_dependency->fence, &chunk_dep);
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i = num_chunks++;
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chunks[i].chunk_id = AMDGPU_CHUNK_ID_SCHEDULED_DEPENDENCIES;
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chunks[i].length_dw = sizeof(struct drm_amdgpu_cs_chunk_dep) / 4;
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chunks[i].chunk_data = (uint64_t)(uintptr_t)&chunk_dep;
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}
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if (sem_info->cs_emit_wait && (sem_info->wait.timeline_syncobj_count ||
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sem_info->wait.syncobj_count || *queue_syncobj_wait)) {
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