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synced 2026-05-08 02:38:04 +02:00
gallivm: add support for payload access
mesh shading has a payload to pass between task and mesh shaders, this acts like shared memory as well, so we use the standard memory hooks to access it. This current adds the payload after the 12-byte header which will contain the x/y/z grid sizes. Reviewed-by: Roland Scheidegger <sroland@vmware.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23066>
This commit is contained in:
Dave Airlie
parent
f3e6582f32
commit
97a2d0aded
4 changed files with 80 additions and 15 deletions
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@ -1557,7 +1557,7 @@ visit_load_ssbo(struct lp_build_nir_context *bld_base,
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nir_src_is_always_uniform(instr->src[1]);
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bld_base->load_mem(bld_base, nir_dest_num_components(instr->dest),
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nir_dest_bit_size(instr->dest),
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index_and_offset_are_uniform, idx, offset, result);
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index_and_offset_are_uniform, false, idx, offset, result);
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}
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@ -1576,7 +1576,7 @@ visit_store_ssbo(struct lp_build_nir_context *bld_base,
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int nc = nir_src_num_components(instr->src[0]);
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int bitsize = nir_src_bit_size(instr->src[0]);
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bld_base->store_mem(bld_base, writemask, nc, bitsize,
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index_and_offset_are_uniform, idx, offset, val);
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index_and_offset_are_uniform, false, idx, offset, val);
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}
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@ -1606,7 +1606,7 @@ visit_ssbo_atomic(struct lp_build_nir_context *bld_base,
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if (instr->intrinsic == nir_intrinsic_ssbo_atomic_swap)
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val2 = get_src(bld_base, instr->src[3]);
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bld_base->atomic_mem(bld_base, nir_intrinsic_atomic_op(instr), bitsize, idx,
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bld_base->atomic_mem(bld_base, nir_intrinsic_atomic_op(instr), bitsize, false, idx,
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offset, val, val2, &result[0]);
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}
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@ -1802,7 +1802,7 @@ visit_shared_load(struct lp_build_nir_context *bld_base,
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bool offset_is_uniform = nir_src_is_always_uniform(instr->src[0]);
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bld_base->load_mem(bld_base, nir_dest_num_components(instr->dest),
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nir_dest_bit_size(instr->dest),
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offset_is_uniform, NULL, offset, result);
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offset_is_uniform, false, NULL, offset, result);
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}
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@ -1817,7 +1817,7 @@ visit_shared_store(struct lp_build_nir_context *bld_base,
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int nc = nir_src_num_components(instr->src[0]);
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int bitsize = nir_src_bit_size(instr->src[0]);
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bld_base->store_mem(bld_base, writemask, nc, bitsize,
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offset_is_uniform, NULL, offset, val);
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offset_is_uniform, false, NULL, offset, val);
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}
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@ -1833,7 +1833,7 @@ visit_shared_atomic(struct lp_build_nir_context *bld_base,
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if (instr->intrinsic == nir_intrinsic_shared_atomic_swap)
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val2 = get_src(bld_base, instr->src[2]);
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bld_base->atomic_mem(bld_base, nir_intrinsic_atomic_op(instr), bitsize, NULL,
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bld_base->atomic_mem(bld_base, nir_intrinsic_atomic_op(instr), bitsize, false, NULL,
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offset, val, val2, &result[0]);
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}
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@ -1993,6 +1993,47 @@ visit_store_scratch(struct lp_build_nir_context *bld_base,
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bld_base->store_scratch(bld_base, writemask, nc, bitsize, offset, val);
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}
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static void
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visit_payload_load(struct lp_build_nir_context *bld_base,
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nir_intrinsic_instr *instr,
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LLVMValueRef result[NIR_MAX_VEC_COMPONENTS])
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{
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LLVMValueRef offset = get_src(bld_base, instr->src[0]);
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bool offset_is_uniform = nir_src_is_always_uniform(instr->src[0]);
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bld_base->load_mem(bld_base, nir_dest_num_components(instr->dest),
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nir_dest_bit_size(instr->dest),
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offset_is_uniform, true, NULL, offset, result);
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}
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static void
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visit_payload_store(struct lp_build_nir_context *bld_base,
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nir_intrinsic_instr *instr)
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{
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LLVMValueRef val = get_src(bld_base, instr->src[0]);
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LLVMValueRef offset = get_src(bld_base, instr->src[1]);
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bool offset_is_uniform = nir_src_is_always_uniform(instr->src[1]);
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int writemask = instr->const_index[1];
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int nc = nir_src_num_components(instr->src[0]);
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int bitsize = nir_src_bit_size(instr->src[0]);
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bld_base->store_mem(bld_base, writemask, nc, bitsize,
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offset_is_uniform, true, NULL, offset, val);
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}
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static void
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visit_payload_atomic(struct lp_build_nir_context *bld_base,
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nir_intrinsic_instr *instr,
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LLVMValueRef result[NIR_MAX_VEC_COMPONENTS])
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{
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LLVMValueRef offset = get_src(bld_base, instr->src[0]);
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LLVMValueRef val = get_src(bld_base, instr->src[1]);
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LLVMValueRef val2 = NULL;
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int bitsize = nir_src_bit_size(instr->src[1]);
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if (instr->intrinsic == nir_intrinsic_task_payload_atomic_swap)
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val2 = get_src(bld_base, instr->src[2]);
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bld_base->atomic_mem(bld_base, nir_intrinsic_atomic_op(instr), bitsize, true, NULL,
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offset, val, val2, &result[0]);
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}
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static void
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visit_intrinsic(struct lp_build_nir_context *bld_base,
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@ -2163,6 +2204,16 @@ visit_intrinsic(struct lp_build_nir_context *bld_base,
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case nir_intrinsic_shader_clock:
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bld_base->clock(bld_base, result);
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break;
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case nir_intrinsic_load_task_payload:
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visit_payload_load(bld_base, instr, result);
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break;
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case nir_intrinsic_store_task_payload:
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visit_payload_store(bld_base, instr);
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break;
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case nir_intrinsic_task_payload_atomic:
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case nir_intrinsic_task_payload_atomic_swap:
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visit_payload_atomic(bld_base, instr, result);
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break;
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default:
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fprintf(stderr, "Unsupported intrinsic: ");
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nir_print_instr(&instr->instr, stderr);
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@ -111,16 +111,17 @@ struct lp_build_nir_context
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/* for SSBO and shared memory */
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void (*load_mem)(struct lp_build_nir_context *bld_base,
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unsigned nc, unsigned bit_size,
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bool index_and_offset_are_uniform,
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bool index_and_offset_are_uniform, bool payload,
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LLVMValueRef index, LLVMValueRef offset, LLVMValueRef result[NIR_MAX_VEC_COMPONENTS]);
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void (*store_mem)(struct lp_build_nir_context *bld_base,
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unsigned writemask, unsigned nc, unsigned bit_size,
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bool index_and_offset_are_uniform,
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bool index_and_offset_are_uniform, bool payload,
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LLVMValueRef index, LLVMValueRef offset, LLVMValueRef dst);
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void (*atomic_mem)(struct lp_build_nir_context *bld_base,
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nir_atomic_op op,
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unsigned bit_size,
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bool payload,
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LLVMValueRef index, LLVMValueRef offset,
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LLVMValueRef val, LLVMValueRef val2,
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LLVMValueRef *result);
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@ -254,6 +255,7 @@ struct lp_build_nir_soa_context
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LLVMValueRef ssbo_ptr;
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LLVMValueRef shared_ptr;
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LLVMValueRef payload_ptr;
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LLVMValueRef scratch_ptr;
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unsigned scratch_size;
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@ -1206,7 +1206,7 @@ ssbo_base_pointer(struct lp_build_nir_context *bld_base,
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static LLVMValueRef
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mem_access_base_pointer(struct lp_build_nir_context *bld_base,
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struct lp_build_context *mem_bld,
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unsigned bit_size,
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unsigned bit_size, bool payload,
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LLVMValueRef index, LLVMValueRef invocation, LLVMValueRef *bounds)
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{
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struct gallivm_state *gallivm = bld_base->base.gallivm;
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@ -1216,7 +1216,14 @@ mem_access_base_pointer(struct lp_build_nir_context *bld_base,
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if (index) {
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ptr = ssbo_base_pointer(bld_base, bit_size, index, invocation, bounds);
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} else {
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ptr = bld->shared_ptr;
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if (payload) {
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ptr = bld->payload_ptr;
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ptr = LLVMBuildPtrToInt(gallivm->builder, ptr, bld_base->int64_bld.elem_type, "");
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ptr = LLVMBuildAdd(gallivm->builder, ptr, lp_build_const_int64(gallivm, 12), "");
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ptr = LLVMBuildIntToPtr(gallivm->builder, ptr, LLVMPointerType(LLVMInt32TypeInContext(gallivm->context), 0), "");
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}
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else
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ptr = bld->shared_ptr;
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*bounds = NULL;
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}
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@ -1231,6 +1238,7 @@ static void emit_load_mem(struct lp_build_nir_context *bld_base,
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unsigned nc,
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unsigned bit_size,
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bool index_and_offset_are_uniform,
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bool payload,
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LLVMValueRef index,
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LLVMValueRef offset,
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LLVMValueRef outval[NIR_MAX_VEC_COMPONENTS])
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@ -1255,7 +1263,7 @@ static void emit_load_mem(struct lp_build_nir_context *bld_base,
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if (index_and_offset_are_uniform && (invocation_0_must_be_active(bld_base) || index)) {
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LLVMValueRef ssbo_limit;
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LLVMValueRef first_active = first_active_invocation(bld_base);
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LLVMValueRef mem_ptr = mem_access_base_pointer(bld_base, load_bld, bit_size, index,
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LLVMValueRef mem_ptr = mem_access_base_pointer(bld_base, load_bld, bit_size, payload, index,
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first_active, &ssbo_limit);
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offset = LLVMBuildExtractElement(gallivm->builder, offset, first_active, "");
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@ -1302,7 +1310,7 @@ static void emit_load_mem(struct lp_build_nir_context *bld_base,
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lp_build_if(&exec_ifthen, gallivm, loop_cond);
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LLVMValueRef ssbo_limit;
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LLVMValueRef mem_ptr = mem_access_base_pointer(bld_base, load_bld, bit_size, index,
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LLVMValueRef mem_ptr = mem_access_base_pointer(bld_base, load_bld, bit_size, payload, index,
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loop_state.counter, &ssbo_limit);
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for (unsigned c = 0; c < nc; c++) {
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@ -1345,6 +1353,7 @@ static void emit_store_mem(struct lp_build_nir_context *bld_base,
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unsigned nc,
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unsigned bit_size,
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bool index_and_offset_are_uniform,
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bool payload,
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LLVMValueRef index,
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LLVMValueRef offset,
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LLVMValueRef dst)
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@ -1366,7 +1375,7 @@ static void emit_store_mem(struct lp_build_nir_context *bld_base,
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*/
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if (index_and_offset_are_uniform && invocation_0_must_be_active(bld_base)) {
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LLVMValueRef ssbo_limit;
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LLVMValueRef mem_ptr = mem_access_base_pointer(bld_base, store_bld, bit_size, index,
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LLVMValueRef mem_ptr = mem_access_base_pointer(bld_base, store_bld, bit_size, payload, index,
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lp_build_const_int32(gallivm, 0), &ssbo_limit);
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offset = LLVMBuildExtractElement(gallivm->builder, offset, lp_build_const_int32(gallivm, 0), "");
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@ -1407,7 +1416,7 @@ static void emit_store_mem(struct lp_build_nir_context *bld_base,
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lp_build_if(&exec_ifthen, gallivm, loop_cond);
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LLVMValueRef ssbo_limit;
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LLVMValueRef mem_ptr = mem_access_base_pointer(bld_base, store_bld, bit_size, index,
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LLVMValueRef mem_ptr = mem_access_base_pointer(bld_base, store_bld, bit_size, payload, index,
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loop_state.counter, &ssbo_limit);
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for (unsigned c = 0; c < nc; c++) {
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@ -1444,6 +1453,7 @@ static void emit_store_mem(struct lp_build_nir_context *bld_base,
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static void emit_atomic_mem(struct lp_build_nir_context *bld_base,
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nir_atomic_op nir_op,
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uint32_t bit_size,
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bool payload,
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LLVMValueRef index, LLVMValueRef offset,
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LLVMValueRef val, LLVMValueRef val2,
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LLVMValueRef *result)
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@ -1471,7 +1481,7 @@ static void emit_atomic_mem(struct lp_build_nir_context *bld_base,
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lp_build_if(&exec_ifthen, gallivm, loop_cond);
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LLVMValueRef ssbo_limit;
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LLVMValueRef mem_ptr = mem_access_base_pointer(bld_base, atomic_bld, bit_size, index,
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LLVMValueRef mem_ptr = mem_access_base_pointer(bld_base, atomic_bld, bit_size, payload, index,
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loop_state.counter, &ssbo_limit);
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LLVMValueRef do_fetch = lp_build_const_int32(gallivm, -1);
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@ -2743,6 +2753,7 @@ void lp_build_nir_soa(struct gallivm_state *gallivm,
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bld.bld_base.aniso_filter_table = params->aniso_filter_table;
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bld.image = params->image;
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bld.shared_ptr = params->shared_ptr;
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bld.payload_ptr = params->payload_ptr;
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bld.coro = params->coro;
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bld.kernel_args_ptr = params->kernel_args;
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bld.indirects = 0;
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@ -282,6 +282,7 @@ struct lp_build_tgsi_params {
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LLVMValueRef ssbo_sizes_ptr;
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const struct lp_build_image_soa *image;
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LLVMValueRef shared_ptr;
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LLVMValueRef payload_ptr;
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const struct lp_build_coro_suspend_info *coro;
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LLVMValueRef kernel_args;
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const struct lp_build_fs_iface *fs_iface;
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